Merge branch 'u-boot-arm/next' into 'u-boot-arm/master'

[platform/kernel/u-boot.git] / drivers / usb / host / ehci-exynos.c

diff --git a/drivers/usb/host/ehci-exynos.c b/drivers/usb/host/ehci-exynos.c
index 66b4de0..9356878 100644 (file)
--- a/drivers/usb/host/ehci-exynos.c
+++ b/drivers/usb/host/ehci-exynos.c
@@ -88,6 +88,8 @@ static int exynos_usb_parse_dt(const void *blob, struct exynos_ehci *exynos)
 /* Setup the EHCI host controller. */
 static void setup_usb_phy(struct exynos_usb_phy *usb)
 {
+       u32 hsic_ctrl;
+
        set_usbhost_mode(USB20_PHY_CFG_HOST_LINK_EN);
 
        set_usbhost_phy_ctrl(POWER_USB_HOST_PHY_CTRL_EN);
@@ -112,6 +114,32 @@ static void setup_usb_phy(struct exynos_usb_phy *usb)
        clrbits_le32(&usb->usbphyctrl0,
                        HOST_CTRL0_LINKSWRST |
                        HOST_CTRL0_UTMISWRST);
+
+       /* HSIC Phy Setting */
+       hsic_ctrl = (HSIC_CTRL_FORCESUSPEND |
+                       HSIC_CTRL_FORCESLEEP |
+                       HSIC_CTRL_SIDDQ);
+
+       clrbits_le32(&usb->hsicphyctrl1, hsic_ctrl);
+       clrbits_le32(&usb->hsicphyctrl2, hsic_ctrl);
+
+       hsic_ctrl = (((HSIC_CTRL_REFCLKDIV_12 & HSIC_CTRL_REFCLKDIV_MASK)
+                               << HSIC_CTRL_REFCLKDIV_SHIFT)
+                       | ((HSIC_CTRL_REFCLKSEL & HSIC_CTRL_REFCLKSEL_MASK)
+                               << HSIC_CTRL_REFCLKSEL_SHIFT)
+                       | HSIC_CTRL_UTMISWRST);
+
+       setbits_le32(&usb->hsicphyctrl1, hsic_ctrl);
+       setbits_le32(&usb->hsicphyctrl2, hsic_ctrl);
+
+       udelay(10);
+
+       clrbits_le32(&usb->hsicphyctrl1, HSIC_CTRL_PHYSWRST |
+                                       HSIC_CTRL_UTMISWRST);
+
+       clrbits_le32(&usb->hsicphyctrl2, HSIC_CTRL_PHYSWRST |
+                                       HSIC_CTRL_UTMISWRST);
+
        udelay(20);
 
        /* EHCI Ctrl setting */
@@ -125,6 +153,8 @@ static void setup_usb_phy(struct exynos_usb_phy *usb)
 /* Reset the EHCI host controller. */
 static void reset_usb_phy(struct exynos_usb_phy *usb)
 {
+       u32 hsic_ctrl;
+
        /* HOST_PHY reset */
        setbits_le32(&usb->usbphyctrl0,
                        HOST_CTRL0_PHYSWRST |
@@ -133,6 +163,15 @@ static void reset_usb_phy(struct exynos_usb_phy *usb)
                        HOST_CTRL0_FORCESUSPEND |
                        HOST_CTRL0_FORCESLEEP);
 
+       /* HSIC Phy reset */
+       hsic_ctrl = (HSIC_CTRL_FORCESUSPEND |
+                       HSIC_CTRL_FORCESLEEP |
+                       HSIC_CTRL_SIDDQ |
+                       HSIC_CTRL_PHYSWRST);
+
+       setbits_le32(&usb->hsicphyctrl1, hsic_ctrl);
+       setbits_le32(&usb->hsicphyctrl2, hsic_ctrl);
+
        set_usbhost_phy_ctrl(POWER_USB_HOST_PHY_CTRL_DISABLE);
 }
 
@@ -164,6 +203,8 @@ int ehci_hcd_init(int index, enum usb_init_type init,
 
        setup_usb_phy(ctx->usb);
 
+       board_usb_init(index, init);
+
        *hccr = ctx->hcd;
        *hcor = (struct ehci_hcor *)((uint32_t) *hccr
                                + HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));