#include <clk.h>
#include <dm.h>
#include <generic-phy.h>
+#include <log.h>
#include <malloc.h>
#include <reset.h>
+#include <dm/device_compat.h>
+#include <dm/devres.h>
+#include <linux/bug.h>
+#include <linux/delay.h>
#include <linux/errno.h>
#include <linux/list.h>
#include <linux/usb/otg.h>
#include <linux/usb/gadget.h>
+#include <phys2bus.h>
#include <asm/byteorder.h>
#include <asm/unaligned.h>
#include <asm/io.h>
unsigned int uTemp = writel(CORE_SOFT_RESET, ®->grstctl);
uint32_t dflt_gusbcfg;
uint32_t rx_fifo_sz, tx_fifo_sz, np_tx_fifo_sz;
+ u32 max_hw_ep;
+ int pdata_hw_ep;
debug("Reseting OTG controller\n");
writel((np_tx_fifo_sz << 16) | rx_fifo_sz,
®->gnptxfsiz);
- for (i = 1; i < DWC2_MAX_HW_ENDPOINTS; i++)
- writel((rx_fifo_sz + np_tx_fifo_sz + tx_fifo_sz*(i-1)) |
- tx_fifo_sz << 16, ®->dieptxf[i-1]);
+ /* retrieve the number of IN Endpoints (excluding ep0) */
+ max_hw_ep = (readl(®->ghwcfg4) & GHWCFG4_NUM_IN_EPS_MASK) >>
+ GHWCFG4_NUM_IN_EPS_SHIFT;
+ pdata_hw_ep = dev->pdata->tx_fifo_sz_nb;
+ /* tx_fifo_sz_nb should equal to number of IN Endpoint */
+ if (pdata_hw_ep && max_hw_ep != pdata_hw_ep)
+ pr_warn("Got %d hw endpoint but %d tx-fifo-size in array !!\n",
+ max_hw_ep, pdata_hw_ep);
+
+ for (i = 0; i < max_hw_ep; i++) {
+ if (pdata_hw_ep)
+ tx_fifo_sz = dev->pdata->tx_fifo_sz_array[i];
+
+ writel((rx_fifo_sz + np_tx_fifo_sz + (tx_fifo_sz * i)) |
+ tx_fifo_sz << 16, ®->dieptxf[i]);
+ }
/* Flush the RX FIFO */
writel(RX_FIFO_FLUSH, ®->grstctl);
while (readl(®->grstctl) & RX_FIFO_FLUSH)
struct dwc2_priv_data {
struct clk_bulk clks;
struct reset_ctl_bulk resets;
- struct phy *phys;
- int num_phys;
+ struct phy_bulk phys;
+ struct udevice *usb33d_supply;
};
int dm_usb_gadget_handle_interrupts(struct udevice *dev)
return dwc2_udc_handle_interrupt();
}
-int dwc2_phy_setup(struct udevice *dev, struct phy **array, int *num_phys)
+static int dwc2_phy_setup(struct udevice *dev, struct phy_bulk *phys)
{
- int i, ret, count;
- struct phy *usb_phys;
-
- /* Return if no phy declared */
- if (!dev_read_prop(dev, "phys", NULL))
- return 0;
-
- count = dev_count_phandle_with_args(dev, "phys", "#phy-cells");
- if (count <= 0)
- return count;
-
- usb_phys = devm_kcalloc(dev, count, sizeof(struct phy),
- GFP_KERNEL);
- if (!usb_phys)
- return -ENOMEM;
-
- for (i = 0; i < count; i++) {
- ret = generic_phy_get_by_index(dev, i, &usb_phys[i]);
- if (ret && ret != -ENOENT) {
- dev_err(dev, "Failed to get USB PHY%d for %s\n",
- i, dev->name);
- return ret;
- }
- }
-
- for (i = 0; i < count; i++) {
- ret = generic_phy_init(&usb_phys[i]);
- if (ret) {
- dev_err(dev, "Can't init USB PHY%d for %s\n",
- i, dev->name);
- goto phys_init_err;
- }
- }
-
- for (i = 0; i < count; i++) {
- ret = generic_phy_power_on(&usb_phys[i]);
- if (ret) {
- dev_err(dev, "Can't power USB PHY%d for %s\n",
- i, dev->name);
- goto phys_poweron_err;
- }
- }
-
- *array = usb_phys;
- *num_phys = count;
-
- return 0;
-
-phys_poweron_err:
- for (i = count - 1; i >= 0; i--)
- generic_phy_power_off(&usb_phys[i]);
+ int ret;
- for (i = 0; i < count; i++)
- generic_phy_exit(&usb_phys[i]);
+ ret = generic_phy_get_bulk(dev, phys);
+ if (ret)
+ return ret;
- return ret;
+ ret = generic_phy_init_bulk(phys);
+ if (ret)
+ return ret;
-phys_init_err:
- for (; i >= 0; i--)
- generic_phy_exit(&usb_phys[i]);
+ ret = generic_phy_power_on_bulk(phys);
+ if (ret)
+ generic_phy_exit_bulk(phys);
return ret;
}
-void dwc2_phy_shutdown(struct udevice *dev, struct phy *usb_phys, int num_phys)
+static void dwc2_phy_shutdown(struct udevice *dev, struct phy_bulk *phys)
{
- int i, ret;
-
- for (i = 0; i < num_phys; i++) {
- if (!generic_phy_valid(&usb_phys[i]))
- continue;
-
- ret = generic_phy_power_off(&usb_phys[i]);
- ret |= generic_phy_exit(&usb_phys[i]);
- if (ret) {
- dev_err(dev, "Can't shutdown USB PHY%d for %s\n",
- i, dev->name);
- }
- }
+ generic_phy_power_off_bulk(phys);
+ generic_phy_exit_bulk(phys);
}
-static int dwc2_udc_otg_ofdata_to_platdata(struct udevice *dev)
+static int dwc2_udc_otg_of_to_plat(struct udevice *dev)
{
- struct dwc2_plat_otg_data *platdata = dev_get_platdata(dev);
- int node = dev_of_offset(dev);
+ struct dwc2_plat_otg_data *plat = dev_get_plat(dev);
+ ulong drvdata;
+ void (*set_params)(struct dwc2_plat_otg_data *data);
+ int ret;
- if (usb_get_dr_mode(node) != USB_DR_MODE_PERIPHERAL) {
+ if (usb_get_dr_mode(dev_ofnode(dev)) != USB_DR_MODE_PERIPHERAL &&
+ usb_get_dr_mode(dev_ofnode(dev)) != USB_DR_MODE_OTG) {
dev_dbg(dev, "Invalid mode\n");
return -ENODEV;
}
- platdata->regs_otg = dev_read_addr(dev);
+ plat->regs_otg = dev_read_addr(dev);
- platdata->rx_fifo_sz = dev_read_u32_default(dev, "g-rx-fifo-size", 0);
- platdata->np_tx_fifo_sz = dev_read_u32_default(dev,
- "g-np-tx-fifo-size", 0);
- platdata->tx_fifo_sz = dev_read_u32_default(dev, "g-tx-fifo-size", 0);
+ plat->rx_fifo_sz = dev_read_u32_default(dev, "g-rx-fifo-size", 0);
+ plat->np_tx_fifo_sz = dev_read_u32_default(dev, "g-np-tx-fifo-size", 0);
+
+ plat->tx_fifo_sz_nb =
+ dev_read_size(dev, "g-tx-fifo-size") / sizeof(u32);
+ if (plat->tx_fifo_sz_nb > DWC2_MAX_HW_ENDPOINTS)
+ plat->tx_fifo_sz_nb = DWC2_MAX_HW_ENDPOINTS;
+ if (plat->tx_fifo_sz_nb) {
+ ret = dev_read_u32_array(dev, "g-tx-fifo-size",
+ plat->tx_fifo_sz_array,
+ plat->tx_fifo_sz_nb);
+ if (ret)
+ return ret;
+ }
+
+ plat->force_b_session_valid =
+ dev_read_bool(dev, "u-boot,force-b-session-valid");
+
+ plat->force_vbus_detection =
+ dev_read_bool(dev, "u-boot,force-vbus-detection");
+
+ /* force plat according compatible */
+ drvdata = dev_get_driver_data(dev);
+ if (drvdata) {
+ set_params = (void *)drvdata;
+ set_params(plat);
+ }
return 0;
}
+static void dwc2_set_stm32mp1_hsotg_params(struct dwc2_plat_otg_data *p)
+{
+ p->activate_stm_id_vb_detection = true;
+ p->usb_gusbcfg =
+ 0 << 15 /* PHY Low Power Clock sel*/
+ | 0x9 << 10 /* USB Turnaround time (0x9 for HS phy) */
+ | 0 << 9 /* [0:HNP disable,1:HNP enable]*/
+ | 0 << 8 /* [0:SRP disable 1:SRP enable]*/
+ | 0 << 6 /* 0: high speed utmi+, 1: full speed serial*/
+ | 0x7 << 0; /* FS timeout calibration**/
+
+ if (p->force_b_session_valid)
+ p->usb_gusbcfg |= 1 << 30; /* FDMOD: Force device mode */
+}
+
static int dwc2_udc_otg_reset_init(struct udevice *dev,
struct reset_ctl_bulk *resets)
{
int ret;
ret = reset_get_bulk(dev, resets);
- if (ret == -ENOTSUPP)
+ if (ret == -ENOTSUPP || ret == -ENOENT)
return 0;
if (ret)
static int dwc2_udc_otg_probe(struct udevice *dev)
{
- struct dwc2_plat_otg_data *platdata = dev_get_platdata(dev);
+ struct dwc2_plat_otg_data *plat = dev_get_plat(dev);
struct dwc2_priv_data *priv = dev_get_priv(dev);
+ struct dwc2_usbotg_reg *usbotg_reg =
+ (struct dwc2_usbotg_reg *)plat->regs_otg;
int ret;
ret = dwc2_udc_otg_clk_init(dev, &priv->clks);
if (ret)
return ret;
- ret = dwc2_phy_setup(dev, &priv->phys, &priv->num_phys);
+ ret = dwc2_phy_setup(dev, &priv->phys);
if (ret)
return ret;
- ret = dwc2_udc_probe(platdata);
+ if (plat->activate_stm_id_vb_detection) {
+ if (CONFIG_IS_ENABLED(DM_REGULATOR) &&
+ (!plat->force_b_session_valid ||
+ plat->force_vbus_detection)) {
+ ret = device_get_supply_regulator(dev, "usb33d-supply",
+ &priv->usb33d_supply);
+ if (ret) {
+ dev_err(dev, "can't get voltage level detector supply\n");
+ return ret;
+ }
+ ret = regulator_set_enable(priv->usb33d_supply, true);
+ if (ret) {
+ dev_err(dev, "can't enable voltage level detector supply\n");
+ return ret;
+ }
+ }
+
+ if (plat->force_b_session_valid &&
+ !plat->force_vbus_detection) {
+ /* Override VBUS detection: enable then value*/
+ setbits_le32(&usbotg_reg->gotgctl, VB_VALOEN);
+ setbits_le32(&usbotg_reg->gotgctl, VB_VALOVAL);
+ } else {
+ /* Enable VBUS sensing */
+ setbits_le32(&usbotg_reg->ggpio,
+ GGPIO_STM32_OTG_GCCFG_VBDEN);
+ }
+ if (plat->force_b_session_valid) {
+ /* Override B session bits: enable then value */
+ setbits_le32(&usbotg_reg->gotgctl, A_VALOEN | B_VALOEN);
+ setbits_le32(&usbotg_reg->gotgctl,
+ A_VALOVAL | B_VALOVAL);
+ } else {
+ /* Enable ID detection */
+ setbits_le32(&usbotg_reg->ggpio,
+ GGPIO_STM32_OTG_GCCFG_IDEN);
+ }
+ }
+
+ ret = dwc2_udc_probe(plat);
if (ret)
return ret;
clk_release_bulk(&priv->clks);
- dwc2_phy_shutdown(dev, priv->phys, priv->num_phys);
+ dwc2_phy_shutdown(dev, &priv->phys);
return dm_scan_fdt_dev(dev);
}
static const struct udevice_id dwc2_udc_otg_ids[] = {
{ .compatible = "snps,dwc2" },
+ { .compatible = "brcm,bcm2835-usb" },
+ { .compatible = "st,stm32mp1-hsotg",
+ .data = (ulong)dwc2_set_stm32mp1_hsotg_params },
+ {},
};
U_BOOT_DRIVER(dwc2_udc_otg) = {
.name = "dwc2-udc-otg",
.id = UCLASS_USB_GADGET_GENERIC,
.of_match = dwc2_udc_otg_ids,
- .ofdata_to_platdata = dwc2_udc_otg_ofdata_to_platdata,
+ .of_to_plat = dwc2_udc_otg_of_to_plat,
.probe = dwc2_udc_otg_probe,
.remove = dwc2_udc_otg_remove,
- .platdata_auto_alloc_size = sizeof(struct dwc2_plat_otg_data),
- .priv_auto_alloc_size = sizeof(struct dwc2_priv_data),
+ .plat_auto = sizeof(struct dwc2_plat_otg_data),
+ .priv_auto = sizeof(struct dwc2_priv_data),
};
+
+int dwc2_udc_B_session_valid(struct udevice *dev)
+{
+ struct dwc2_plat_otg_data *plat = dev_get_plat(dev);
+ struct dwc2_usbotg_reg *usbotg_reg =
+ (struct dwc2_usbotg_reg *)plat->regs_otg;
+
+ return readl(&usbotg_reg->gotgctl) & B_SESSION_VALID;
+}
#endif /* CONFIG_IS_ENABLED(DM_USB_GADGET) */
projects / platform / kernel / u-boot.git / blobdiff