/*
* NVIDIA Tegra210 QSPI controller driver
*
- * (C) Copyright 2015-2019 NVIDIA Corporation <www.nvidia.com>
+ * (C) Copyright 2015-2020 NVIDIA Corporation <www.nvidia.com>
*
*/
#include <common.h>
#include <dm.h>
+#include <log.h>
#include <time.h>
+#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch-tegra/clk_rst.h>
#include <spi.h>
#include <fdtdec.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
#include "tegra_spi.h"
DECLARE_GLOBAL_DATA_PTR;
int last_transaction_us;
};
-static int tegra210_qspi_ofdata_to_platdata(struct udevice *bus)
+static int tegra210_qspi_of_to_plat(struct udevice *bus)
{
- struct tegra_spi_platdata *plat = bus->platdata;
- const void *blob = gd->fdt_blob;
- int node = dev_of_offset(bus);
+ struct tegra_spi_plat *plat = dev_get_plat(bus);
- plat->base = devfdt_get_addr(bus);
+ plat->base = dev_read_addr(bus);
plat->periph_id = clock_decode_periph_id(bus);
if (plat->periph_id == PERIPH_ID_NONE) {
}
/* Use 500KHz as a suitable default */
- plat->frequency = fdtdec_get_int(blob, node, "spi-max-frequency",
- 500000);
- plat->deactivate_delay_us = fdtdec_get_int(blob, node,
- "spi-deactivate-delay", 0);
+ plat->frequency = dev_read_u32_default(bus, "spi-max-frequency",
+ 500000);
+ plat->deactivate_delay_us = dev_read_u32_default(bus,
+ "spi-deactivate-delay",
+ 0);
debug("%s: base=%#08lx, periph_id=%d, max-frequency=%d, deactivate_delay=%d\n",
__func__, plat->base, plat->periph_id, plat->frequency,
plat->deactivate_delay_us);
static int tegra210_qspi_probe(struct udevice *bus)
{
- struct tegra_spi_platdata *plat = dev_get_platdata(bus);
+ struct tegra_spi_plat *plat = dev_get_plat(bus);
struct tegra210_qspi_priv *priv = dev_get_priv(bus);
priv->regs = (struct qspi_regs *)plat->base;
static void spi_cs_activate(struct udevice *dev)
{
struct udevice *bus = dev->parent;
- struct tegra_spi_platdata *pdata = dev_get_platdata(bus);
+ struct tegra_spi_plat *pdata = dev_get_plat(bus);
struct tegra210_qspi_priv *priv = dev_get_priv(bus);
/* If it's too soon to do another transaction, wait */
static void spi_cs_deactivate(struct udevice *dev)
{
struct udevice *bus = dev->parent;
- struct tegra_spi_platdata *pdata = dev_get_platdata(bus);
+ struct tegra_spi_plat *pdata = dev_get_plat(bus);
struct tegra210_qspi_priv *priv = dev_get_priv(bus);
setbits_le32(&priv->regs->command1, QSPI_CMD1_CS_SW_VAL);
int num_bytes, tm, ret;
debug("%s: slave %u:%u dout %p din %p bitlen %u\n",
- __func__, bus->seq, spi_chip_select(dev), dout, din, bitlen);
+ __func__, dev_seq(bus), spi_chip_select(dev), dout, din, bitlen);
if (bitlen % 8)
return -1;
num_bytes = bitlen / 8;
static int tegra210_qspi_set_speed(struct udevice *bus, uint speed)
{
- struct tegra_spi_platdata *plat = bus->platdata;
+ struct tegra_spi_plat *plat = dev_get_plat(bus);
struct tegra210_qspi_priv *priv = dev_get_priv(bus);
if (speed > plat->frequency)
.id = UCLASS_SPI,
.of_match = tegra210_qspi_ids,
.ops = &tegra210_qspi_ops,
- .ofdata_to_platdata = tegra210_qspi_ofdata_to_platdata,
- .platdata_auto_alloc_size = sizeof(struct tegra_spi_platdata),
- .priv_auto_alloc_size = sizeof(struct tegra210_qspi_priv),
- .per_child_auto_alloc_size = sizeof(struct spi_slave),
+ .of_to_plat = tegra210_qspi_of_to_plat,
+ .plat_auto = sizeof(struct tegra_spi_plat),
+ .priv_auto = sizeof(struct tegra210_qspi_priv),
+ .per_child_auto = sizeof(struct spi_slave),
.probe = tegra210_qspi_probe,
};