Merge tag 'spi-fix-v6.6-merge-window' of git://git.kernel.org/pub/scm/linux/kernel...

[platform/kernel/linux-rpi.git] / drivers / spi / spi-sun6i.c

diff --git a/drivers/spi/spi-sun6i.c b/drivers/spi/spi-sun6i.c
index 57c828e..fddc633 100644 (file)
--- a/drivers/spi/spi-sun6i.c
+++ b/drivers/spi/spi-sun6i.c
@@ -14,7 +14,7 @@
 #include <linux/interrupt.h>
 #include <linux/io.h>
 #include <linux/module.h>
-#include <linux/of_device.h>
+#include <linux/of.h>
 #include <linux/platform_device.h>
 #include <linux/pm_runtime.h>
 #include <linux/reset.h>
@@ -83,6 +83,9 @@
 #define SUN6I_XMIT_CNT_REG             0x34
 
 #define SUN6I_BURST_CTL_CNT_REG                0x38
+#define SUN6I_BURST_CTL_CNT_STC_MASK           GENMASK(23, 0)
+#define SUN6I_BURST_CTL_CNT_DRM                        BIT(28)
+#define SUN6I_BURST_CTL_CNT_QUAD_EN            BIT(29)
 
 #define SUN6I_TXDATA_REG               0x200
 #define SUN6I_RXDATA_REG               0x300
@@ -90,6 +93,7 @@
 struct sun6i_spi_cfg {
        unsigned long           fifo_depth;
        bool                    has_clk_ctl;
+       u32                     mode_bits;
 };
 
 struct sun6i_spi {
@@ -276,7 +280,7 @@ static int sun6i_spi_transfer_one(struct spi_master *master,
        unsigned int div, div_cdr1, div_cdr2, timeout;
        unsigned int start, end, tx_time;
        unsigned int trig_level;
-       unsigned int tx_len = 0, rx_len = 0;
+       unsigned int tx_len = 0, rx_len = 0, nbits = 0;
        bool use_dma;
        int ret = 0;
        u32 reg;
@@ -429,13 +433,29 @@ static int sun6i_spi_transfer_one(struct spi_master *master,
        sun6i_spi_write(sspi, SUN6I_GBL_CTL_REG, reg);
 
        /* Setup the transfer now... */
-       if (sspi->tx_buf)
+       if (sspi->tx_buf) {
                tx_len = tfr->len;
+               nbits = tfr->tx_nbits;
+       } else if (tfr->rx_buf) {
+               nbits = tfr->rx_nbits;
+       }
+
+       switch (nbits) {
+       case SPI_NBITS_DUAL:
+               reg = SUN6I_BURST_CTL_CNT_DRM;
+               break;
+       case SPI_NBITS_QUAD:
+               reg = SUN6I_BURST_CTL_CNT_QUAD_EN;
+               break;
+       case SPI_NBITS_SINGLE:
+       default:
+               reg = FIELD_PREP(SUN6I_BURST_CTL_CNT_STC_MASK, tx_len);
+       }
 
        /* Setup the counters */
+       sun6i_spi_write(sspi, SUN6I_BURST_CTL_CNT_REG, reg);
        sun6i_spi_write(sspi, SUN6I_BURST_CNT_REG, tfr->len);
        sun6i_spi_write(sspi, SUN6I_XMIT_CNT_REG, tx_len);
-       sun6i_spi_write(sspi, SUN6I_BURST_CTL_CNT_REG, tx_len);
 
        if (!use_dma) {
                /* Fill the TX FIFO */
@@ -649,7 +669,8 @@ static int sun6i_spi_probe(struct platform_device *pdev)
        master->set_cs = sun6i_spi_set_cs;
        master->transfer_one = sun6i_spi_transfer_one;
        master->num_chipselect = 4;
-       master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST;
+       master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST |
+                           sspi->cfg->mode_bits;
        master->bits_per_word_mask = SPI_BPW_MASK(8);
        master->dev.of_node = pdev->dev.of_node;
        master->auto_runtime_pm = true;
@@ -767,6 +788,7 @@ static const struct sun6i_spi_cfg sun8i_h3_spi_cfg = {
 
 static const struct sun6i_spi_cfg sun50i_r329_spi_cfg = {
        .fifo_depth     = SUN8I_FIFO_DEPTH,
+       .mode_bits      = SPI_RX_DUAL | SPI_TX_DUAL | SPI_RX_QUAD | SPI_TX_QUAD,
 };
 
 static const struct of_device_id sun6i_spi_match[] = {