Prepare v2023.10

[platform/kernel/u-boot.git] / drivers / serial / serial_xuartlite.c

diff --git a/drivers/serial/serial_xuartlite.c b/drivers/serial/serial_xuartlite.c
index fedd2a9..b6197da 100644 (file)
--- a/drivers/serial/serial_xuartlite.c
+++ b/drivers/serial/serial_xuartlite.c
@@ -1,22 +1,20 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2008 - 2015 Michal Simek <monstr@monstr.eu>
  * Clean driver and add xilinx constant from header file
  *
  * (C) Copyright 2004 Atmark Techno, Inc.
  * Yasushi SHOJI <yashi@atmark-techno.com>
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <config.h>
 #include <common.h>
 #include <dm.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 #include <linux/compiler.h>
 #include <serial.h>
 
-DECLARE_GLOBAL_DATA_PTR;
-
 #define SR_TX_FIFO_FULL                BIT(3) /* transmit FIFO full */
 #define SR_TX_FIFO_EMPTY       BIT(2) /* transmit FIFO empty */
 #define SR_RX_FIFO_VALID_DATA  BIT(0) /* data in receive FIFO */
@@ -25,6 +23,8 @@ DECLARE_GLOBAL_DATA_PTR;
 #define ULITE_CONTROL_RST_TX   0x01
 #define ULITE_CONTROL_RST_RX   0x02
 
+static bool little_endian;
+
 struct uartlite {
        unsigned int rx_fifo;
        unsigned int tx_fifo;
@@ -32,62 +32,85 @@ struct uartlite {
        unsigned int control;
 };
 
-struct uartlite_platdata {
+struct uartlite_plat {
        struct uartlite *regs;
 };
 
+static u32 uart_in32(void __iomem *addr)
+{
+       if (little_endian)
+               return in_le32(addr);
+       else
+               return in_be32(addr);
+}
+
+static void uart_out32(void __iomem *addr, u32 val)
+{
+       if (little_endian)
+               out_le32(addr, val);
+       else
+               out_be32(addr, val);
+}
+
 static int uartlite_serial_putc(struct udevice *dev, const char ch)
 {
-       struct uartlite_platdata *plat = dev_get_platdata(dev);
+       struct uartlite_plat *plat = dev_get_plat(dev);
        struct uartlite *regs = plat->regs;
 
-       if (in_be32(&regs->status) & SR_TX_FIFO_FULL)
+       if (uart_in32(&regs->status) & SR_TX_FIFO_FULL)
                return -EAGAIN;
 
-       out_be32(&regs->tx_fifo, ch & 0xff);
+       uart_out32(&regs->tx_fifo, ch & 0xff);
 
        return 0;
 }
 
 static int uartlite_serial_getc(struct udevice *dev)
 {
-       struct uartlite_platdata *plat = dev_get_platdata(dev);
+       struct uartlite_plat *plat = dev_get_plat(dev);
        struct uartlite *regs = plat->regs;
 
-       if (!(in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA))
+       if (!(uart_in32(&regs->status) & SR_RX_FIFO_VALID_DATA))
                return -EAGAIN;
 
-       return in_be32(&regs->rx_fifo) & 0xff;
+       return uart_in32(&regs->rx_fifo) & 0xff;
 }
 
 static int uartlite_serial_pending(struct udevice *dev, bool input)
 {
-       struct uartlite_platdata *plat = dev_get_platdata(dev);
+       struct uartlite_plat *plat = dev_get_plat(dev);
        struct uartlite *regs = plat->regs;
 
        if (input)
-               return in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA;
+               return uart_in32(&regs->status) & SR_RX_FIFO_VALID_DATA;
 
-       return !(in_be32(&regs->status) & SR_TX_FIFO_EMPTY);
+       return !(uart_in32(&regs->status) & SR_TX_FIFO_EMPTY);
 }
 
 static int uartlite_serial_probe(struct udevice *dev)
 {
-       struct uartlite_platdata *plat = dev_get_platdata(dev);
+       struct uartlite_plat *plat = dev_get_plat(dev);
        struct uartlite *regs = plat->regs;
-
-       out_be32(&regs->control, 0);
-       out_be32(&regs->control, ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX);
-       in_be32(&regs->control);
+       int ret;
+
+       uart_out32(&regs->control, 0);
+       uart_out32(&regs->control, ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX);
+       ret = uart_in32(&regs->status);
+       /* Endianness detection */
+       if ((ret & SR_TX_FIFO_EMPTY) != SR_TX_FIFO_EMPTY) {
+               little_endian = true;
+               uart_out32(&regs->control, ULITE_CONTROL_RST_RX |
+                          ULITE_CONTROL_RST_TX);
+       }
 
        return 0;
 }
 
-static int uartlite_serial_ofdata_to_platdata(struct udevice *dev)
+static int uartlite_serial_of_to_plat(struct udevice *dev)
 {
-       struct uartlite_platdata *plat = dev_get_platdata(dev);
+       struct uartlite_plat *plat = dev_get_plat(dev);
 
-       plat->regs = (struct uartlite *)devfdt_get_addr(dev);
+       plat->regs = dev_read_addr_ptr(dev);
 
        return 0;
 }
@@ -108,11 +131,10 @@ U_BOOT_DRIVER(serial_uartlite) = {
        .name   = "serial_uartlite",
        .id     = UCLASS_SERIAL,
        .of_match = uartlite_serial_ids,
-       .ofdata_to_platdata = uartlite_serial_ofdata_to_platdata,
-       .platdata_auto_alloc_size = sizeof(struct uartlite_platdata),
+       .of_to_plat = uartlite_serial_of_to_plat,
+       .plat_auto      = sizeof(struct uartlite_plat),
        .probe = uartlite_serial_probe,
        .ops    = &uartlite_serial_ops,
-       .flags = DM_FLAG_PRE_RELOC,
 };
 
 #ifdef CONFIG_DEBUG_UART_UARTLITE
@@ -121,21 +143,28 @@ U_BOOT_DRIVER(serial_uartlite) = {
 
 static inline void _debug_uart_init(void)
 {
-       struct uartlite *regs = (struct uartlite *)CONFIG_DEBUG_UART_BASE;
-
-       out_be32(&regs->control, 0);
-       out_be32(&regs->control, ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX);
-       in_be32(&regs->control);
+       struct uartlite *regs = (struct uartlite *)CONFIG_VAL(DEBUG_UART_BASE);
+       int ret;
+
+       uart_out32(&regs->control, 0);
+       uart_out32(&regs->control, ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX);
+       ret = uart_in32(&regs->status);
+       /* Endianness detection */
+       if ((ret & SR_TX_FIFO_EMPTY) != SR_TX_FIFO_EMPTY) {
+               little_endian = true;
+               uart_out32(&regs->control, ULITE_CONTROL_RST_RX |
+                          ULITE_CONTROL_RST_TX);
+       }
 }
 
 static inline void _debug_uart_putc(int ch)
 {
-       struct uartlite *regs = (struct uartlite *)CONFIG_DEBUG_UART_BASE;
+       struct uartlite *regs = (struct uartlite *)CONFIG_VAL(DEBUG_UART_BASE);
 
-       while (in_be32(&regs->status) & SR_TX_FIFO_FULL)
+       while (uart_in32(&regs->status) & SR_TX_FIFO_FULL)
                ;
 
-       out_be32(&regs->tx_fifo, ch & 0xff);
+       uart_out32(&regs->tx_fifo, ch & 0xff);
 }
 
 DEBUG_UART_FUNCS