serial: stm32x7: prepare the ground to STM32F4 support

[platform/kernel/u-boot.git] / drivers / serial / serial_stm32x7.h

diff --git a/drivers/serial/serial_stm32x7.h b/drivers/serial/serial_stm32x7.h
index 6d36b74..4c6b7d4 100644 (file)
--- a/drivers/serial/serial_stm32x7.h
+++ b/drivers/serial/serial_stm32x7.h
@@ -8,30 +8,40 @@
 #ifndef _SERIAL_STM32_X7_
 #define _SERIAL_STM32_X7_
 
-struct stm32_usart {
-       u32 cr1;
-       u32 cr2;
-       u32 cr3;
-       u32 brr;
-       u32 gtpr;
-       u32 rtor;
-       u32 rqr;
-       u32 sr;
-       u32 icr;
-       u32 rd_dr;
-       u32 tx_dr;
+#define CR1_OFFSET(x)  (x ? 0x0c : 0x00)
+#define CR3_OFFSET(x)  (x ? 0x14 : 0x08)
+#define BRR_OFFSET(x)  (x ? 0x08 : 0x0c)
+#define ISR_OFFSET(x)  (x ? 0x00 : 0x1c)
+/*
+ * STM32F4 has one Data Register (DR) for received or transmitted
+ * data, so map Receive Data Register (RDR) and Transmit Data
+ * Register (TDR) at the same offset
+ */
+#define RDR_OFFSET(x)  (x ? 0x04 : 0x24)
+#define TDR_OFFSET(x)  (x ? 0x04 : 0x28)
+
+struct stm32_uart_info {
+       u8 uart_enable_bit;     /* UART_CR1_UE */
+       bool stm32f4;           /* true for STM32F4, false otherwise */
+       bool has_overrun_disable;
+};
+
+struct stm32_uart_info stm32x7_info = {
+       .uart_enable_bit = 0,
+       .stm32f4 = false,
+       .has_overrun_disable = true,
 };
 
 /* Information about a serial port */
 struct stm32x7_serial_platdata {
-       struct stm32_usart *base;  /* address of registers in physical memory */
+       fdt_addr_t base;  /* address of registers in physical memory */
+       struct stm32_uart_info *uart_info;
        unsigned long int clock_rate;
 };
 
 #define USART_CR1_OVER8                        BIT(15)
 #define USART_CR1_TE                   BIT(3)
 #define USART_CR1_RE                   BIT(2)
-#define USART_CR1_UE                   BIT(0)
 
 #define USART_CR3_OVRDIS               BIT(12)