#include <asm/io.h>
#include <serial.h>
#include <asm/arch/stm32.h>
-#include <dm/platform_data/serial_stm32x7.h>
#include "serial_stm32x7.h"
DECLARE_GLOBAL_DATA_PTR;
{
struct stm32x7_serial_platdata *plat = dev->platdata;
struct stm32_usart *const usart = plat->base;
- u32 clock, int_div, frac_div, tmp;
+ u32 int_div, mantissa, fraction, oversampling;
- if (((u32)usart & STM32_BUS_MASK) == APB1_PERIPH_BASE)
- clock = clock_get(CLOCK_APB1);
- else if (((u32)usart & STM32_BUS_MASK) == APB2_PERIPH_BASE)
- clock = clock_get(CLOCK_APB2);
- else
- return -EINVAL;
+ int_div = DIV_ROUND_CLOSEST(plat->clock_rate, baudrate);
+
+ if (int_div < 16) {
+ oversampling = 8;
+ setbits_le32(&usart->cr1, USART_CR1_OVER8);
+ } else {
+ oversampling = 16;
+ clrbits_le32(&usart->cr1, USART_CR1_OVER8);
+ }
+
+ mantissa = (int_div / oversampling) << USART_BRR_M_SHIFT;
+ fraction = int_div % oversampling;
- int_div = (25 * clock) / (4 * baudrate);
- tmp = ((int_div / 100) << USART_BRR_M_SHIFT) & USART_BRR_M_MASK;
- frac_div = int_div - (100 * (tmp >> USART_BRR_M_SHIFT));
- tmp |= (((frac_div * 16) + 50) / 100) & USART_BRR_F_MASK;
- writel(tmp, &usart->brr);
+ writel(mantissa | fraction, &usart->brr);
return 0;
}
}
#endif
+ plat->clock_rate = clk_get_rate(&clk);
+ if (plat->clock_rate < 0) {
+ clk_disable(&clk);
+ return plat->clock_rate;
+ };
+
/* Disable usart-> disable overrun-> enable usart */
clrbits_le32(&usart->cr1, USART_CR1_RE | USART_CR1_TE | USART_CR1_UE);
setbits_le32(&usart->cr3, USART_CR3_OVRDIS);
#if CONFIG_IS_ENABLED(OF_CONTROL)
static const struct udevice_id stm32_serial_id[] = {
- {.compatible = "st,stm32-usart"},
- {.compatible = "st,stm32-uart"},
+ {.compatible = "st,stm32f7-usart"},
+ {.compatible = "st,stm32f7-uart"},
{}
};