#include <common.h>
#include <watchdog.h>
-#ifdef CFG_PL010_SERIAL
+#if defined(CFG_PL010_SERIAL) || defined(CFG_PL011_SERIAL)
-#include "serial_pl011.h"
+#include "serial_pl01x.h"
#define IO_WRITE(addr, val) (*(volatile unsigned int *)(addr) = (val))
#define IO_READ(addr) (*(volatile unsigned int *)(addr))
-/* Integrator AP has two UARTs, we use the first one, at 38400-8-N-1 */
+/*
+ * Integrator AP has two UARTs, we use the first one, at 38400-8-N-1
+ * Integrator CP has two UARTs, use the first one, at 38400-8-N-1
+ * Versatile PB has four UARTs.
+ */
#define CONSOLE_PORT CONFIG_CONS_INDEX
#define baudRate CONFIG_BAUDRATE
static volatile unsigned char *const port[] = CONFIG_PL01x_PORTS;
#define NUM_PORTS (sizeof(port)/sizeof(port[0]))
+static void pl01x_putc (int portnum, char c);
+static int pl01x_getc (int portnum);
+static int pl01x_tstc (int portnum);
-static void pl010_putc (int portnum, char c);
-static int pl010_getc (int portnum);
-static int pl010_tstc (int portnum);
-
+#ifdef CFG_PL010_SERIAL
int serial_init (void)
{
*/
IO_WRITE (port[CONSOLE_PORT] + UART_PL010_CR, (UART_PL010_CR_UARTEN));
- return (0);
+ return 0;
}
+#endif /* CFG_PL010_SERIAL */
+
+#ifdef CFG_PL011_SERIAL
+
+int serial_init (void)
+{
+ unsigned int temp;
+ unsigned int divider;
+ unsigned int remainder;
+ unsigned int fraction;
+
+ /*
+ ** First, disable everything.
+ */
+ IO_WRITE (port[CONSOLE_PORT] + UART_PL011_CR, 0x0);
+
+ /*
+ ** Set baud rate
+ **
+ ** IBRD = UART_CLK / (16 * BAUD_RATE)
+ ** FBRD = ROUND((64 * MOD(UART_CLK,(16 * BAUD_RATE))) / (16 * BAUD_RATE))
+ */
+ temp = 16 * baudRate;
+ divider = CONFIG_PL011_CLOCK / temp;
+ remainder = CONFIG_PL011_CLOCK % temp;
+ temp = (8 * remainder) / baudRate;
+ fraction = (temp >> 1) + (temp & 1);
+
+ IO_WRITE (port[CONSOLE_PORT] + UART_PL011_IBRD, divider);
+ IO_WRITE (port[CONSOLE_PORT] + UART_PL011_FBRD, fraction);
+
+ /*
+ ** Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled.
+ */
+ IO_WRITE (port[CONSOLE_PORT] + UART_PL011_LCRH,
+ (UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN));
+
+ /*
+ ** Finally, enable the UART
+ */
+ IO_WRITE (port[CONSOLE_PORT] + UART_PL011_CR,
+ (UART_PL011_CR_UARTEN | UART_PL011_CR_TXE |
+ UART_PL011_CR_RXE));
+
+ return 0;
+}
+
+#endif /* CFG_PL011_SERIAL */
+
void serial_putc (const char c)
{
if (c == '\n')
- pl010_putc (CONSOLE_PORT, '\r');
+ pl01x_putc (CONSOLE_PORT, '\r');
- pl010_putc (CONSOLE_PORT, c);
+ pl01x_putc (CONSOLE_PORT, c);
}
void serial_puts (const char *s)
int serial_getc (void)
{
- return pl010_getc (CONSOLE_PORT);
+ return pl01x_getc (CONSOLE_PORT);
}
int serial_tstc (void)
{
- return pl010_tstc (CONSOLE_PORT);
+ return pl01x_tstc (CONSOLE_PORT);
}
void serial_setbrg (void)
{
}
-static void pl010_putc (int portnum, char c)
+static void pl01x_putc (int portnum, char c)
{
/* Wait until there is space in the FIFO */
while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_TXFF)
IO_WRITE (port[portnum] + UART_PL01x_DR, c);
}
-static int pl010_getc (int portnum)
+static int pl01x_getc (int portnum)
{
unsigned int data;
return (int) data;
}
-static int pl010_tstc (int portnum)
+static int pl01x_tstc (int portnum)
{
WATCHDOG_RESET();
return !(IO_READ (port[portnum] + UART_PL01x_FR) &