+// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2007
* Matthias Fuchs, esd gmbh, matthias.fuchs@esd-electronics.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
*/
/*
#include <common.h>
#include <command.h>
-#include <rtc.h>
+#include <dm.h>
#include <i2c.h>
-
-#if defined(CONFIG_RTC_RX8025) && defined(CONFIG_CMD_DATE)
+#include <rtc.h>
/*---------------------------------------------------------------------*/
#undef DEBUG_RTC
#endif
/*---------------------------------------------------------------------*/
-#ifndef CFG_I2C_RTC_ADDR
-# define CFG_I2C_RTC_ADDR 0x32
-#endif
+enum rx_model {
+ model_rx_8025,
+ model_rx_8035,
+};
/*
* RTC register addresses
#define RTC_DATE_REG_ADDR 0x04
#define RTC_MON_REG_ADDR 0x05
#define RTC_YR_REG_ADDR 0x06
+#define RTC_OFFSET_REG_ADDR 0x07
#define RTC_CTL1_REG_ADDR 0x0e
#define RTC_CTL2_REG_ADDR 0x0f
* address in a first cycle that is terminated by
* a STOP condition. The chips needs a 'restart'
* sequence (start sequence without a prior stop).
- * This driver has been written for a 4xx board.
- * U-Boot's 4xx i2c driver is currently not capable
- * to generate such cycles to some work arounds
- * are used.
*/
-/* static uchar rtc_read (uchar reg); */
-#define rtc_read(reg) buf[((reg) + 1) & 0xf]
+#define rtc_read(reg) buf[(reg) & 0xf]
+
+static int rtc_write(struct udevice *dev, uchar reg, uchar val);
-static void rtc_write (uchar reg, uchar val);
-static uchar bin2bcd (unsigned int n);
-static unsigned bcd2bin (uchar c);
+static int rx8025_is_osc_stopped(enum rx_model model, int ctrl2)
+{
+ int xstp = ctrl2 & RTC_CTL2_BIT_XST;
+ /* XSTP bit has different polarity on RX-8025 vs RX-8035.
+ * RX-8025: 0 == oscillator stopped
+ * RX-8035: 1 == oscillator stopped
+ */
+
+ if (model == model_rx_8025)
+ xstp = !xstp;
+
+ return xstp;
+}
/*
* Get the current time from the RTC
*/
-void rtc_get (struct rtc_time *tmp)
+static int rx8025_rtc_get(struct udevice *dev, struct rtc_time *tmp)
{
+ int rel = 0;
uchar sec, min, hour, mday, wday, mon, year, ctl2;
uchar buf[16];
- if (i2c_read(CFG_I2C_RTC_ADDR, 0, 0, buf, 16))
+ if (dm_i2c_read(dev, 0, buf, sizeof(buf))) {
printf("Error reading from RTC\n");
+ return -EIO;
+ }
sec = rtc_read(RTC_SEC_REG_ADDR);
min = rtc_read(RTC_MIN_REG_ADDR);
mon = rtc_read(RTC_MON_REG_ADDR);
year = rtc_read(RTC_YR_REG_ADDR);
- DEBUGR ("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
- "hr: %02x min: %02x sec: %02x\n",
- year, mon, mday, wday, hour, min, sec);
+ DEBUGR("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
+ "hr: %02x min: %02x sec: %02x\n",
+ year, mon, mday, wday, hour, min, sec);
/* dump status */
ctl2 = rtc_read(RTC_CTL2_REG_ADDR);
- if (ctl2 & RTC_CTL2_BIT_PON)
+ if (ctl2 & RTC_CTL2_BIT_PON) {
printf("RTC: power-on detected\n");
+ rel = -1;
+ }
- if (ctl2 & RTC_CTL2_BIT_VDET)
+ if (ctl2 & RTC_CTL2_BIT_VDET) {
printf("RTC: voltage drop detected\n");
-
- if (!(ctl2 & RTC_CTL2_BIT_XST))
+ rel = -1;
+ }
+ if (rx8025_is_osc_stopped(dev->driver_data, ctl2)) {
printf("RTC: oscillator stop detected\n");
+ rel = -1;
+ }
+
+ tmp->tm_sec = bcd2bin(sec & 0x7F);
+ tmp->tm_min = bcd2bin(min & 0x7F);
+ if (rtc_read(RTC_CTL1_REG_ADDR) & RTC_CTL1_BIT_2412)
+ tmp->tm_hour = bcd2bin(hour & 0x3F);
+ else
+ tmp->tm_hour = bcd2bin(hour & 0x1F) % 12 +
+ ((hour & 0x20) ? 12 : 0);
- tmp->tm_sec = bcd2bin (sec & 0x7F);
- tmp->tm_min = bcd2bin (min & 0x7F);
- tmp->tm_hour = bcd2bin (hour & 0x3F);
tmp->tm_mday = bcd2bin (mday & 0x3F);
tmp->tm_mon = bcd2bin (mon & 0x1F);
tmp->tm_year = bcd2bin (year) + ( bcd2bin (year) >= 70 ? 1900 : 2000);
tmp->tm_yday = 0;
tmp->tm_isdst= 0;
- DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
- tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
- tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
-}
+ DEBUGR("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
+ tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
+ tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
+ return rel;
+}
/*
* Set the RTC
*/
-void rtc_set (struct rtc_time *tmp)
+static int rx8025_rtc_set(struct udevice *dev, const struct rtc_time *tmp)
{
- DEBUGR ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
- tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
- tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
+ /* To work around the read/write cycle issue mentioned
+ * at the top of this file, write all the time registers
+ * in one I2C transaction
+ */
+ u8 write_op[8];
+
+ /* 2412 flag must be set before doing a RTC write,
+ * otherwise the seconds and minute register
+ * will be cleared when the flag is set
+ */
+ if (rtc_write(dev, RTC_CTL1_REG_ADDR, RTC_CTL1_BIT_2412))
+ return -EIO;
+
+ DEBUGR("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
+ tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
+ tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
if (tmp->tm_year < 1970 || tmp->tm_year > 2069)
printf("WARNING: year should be between 1970 and 2069!\n");
- rtc_write (RTC_YR_REG_ADDR, bin2bcd (tmp->tm_year % 100));
- rtc_write (RTC_MON_REG_ADDR, bin2bcd (tmp->tm_mon));
- rtc_write (RTC_DAY_REG_ADDR, bin2bcd (tmp->tm_wday));
- rtc_write (RTC_DATE_REG_ADDR, bin2bcd (tmp->tm_mday));
- rtc_write (RTC_HR_REG_ADDR, bin2bcd (tmp->tm_hour));
- rtc_write (RTC_MIN_REG_ADDR, bin2bcd (tmp->tm_min));
- rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec));
+ write_op[RTC_SEC_REG_ADDR] = bin2bcd(tmp->tm_sec);
+ write_op[RTC_MIN_REG_ADDR] = bin2bcd(tmp->tm_min);
+ write_op[RTC_HR_REG_ADDR] = bin2bcd(tmp->tm_hour);
+ write_op[RTC_DAY_REG_ADDR] = bin2bcd(tmp->tm_wday);
+ write_op[RTC_DATE_REG_ADDR] = bin2bcd(tmp->tm_mday);
+ write_op[RTC_MON_REG_ADDR] = bin2bcd(tmp->tm_mon);
+ write_op[RTC_YR_REG_ADDR] = bin2bcd(tmp->tm_year % 100);
+ write_op[RTC_OFFSET_REG_ADDR] = 0;
- rtc_write (RTC_CTL1_REG_ADDR, RTC_CTL1_BIT_2412);
+ return dm_i2c_write(dev, 0, &write_op[0], 8);
}
-
/*
- * Reset the RTC. We setting the date back to 1970-01-01.
+ * Reset the RTC
*/
-void rtc_reset (void)
+static int rx8025_rtc_reset(struct udevice *dev)
{
- struct rtc_time tmp;
uchar buf[16];
uchar ctl2;
- if (i2c_read(CFG_I2C_RTC_ADDR, 0, 0, buf, 16))
+ if (dm_i2c_read(dev, 0, buf, sizeof(buf))) {
printf("Error reading from RTC\n");
+ return -EIO;
+ }
ctl2 = rtc_read(RTC_CTL2_REG_ADDR);
ctl2 &= ~(RTC_CTL2_BIT_PON | RTC_CTL2_BIT_VDET);
- ctl2 |= RTC_CTL2_BIT_XST | RTC_CTL2_BIT_VDSL;
- rtc_write (RTC_CTL2_REG_ADDR, ctl2);
- tmp.tm_year = 1970;
- tmp.tm_mon = 1;
- tmp.tm_mday= 1;
- tmp.tm_hour = 0;
- tmp.tm_min = 0;
- tmp.tm_sec = 0;
+ if (dev->driver_data == model_rx_8035)
+ ctl2 &= ~(RTC_CTL2_BIT_XST);
+ else
+ ctl2 |= RTC_CTL2_BIT_XST;
- rtc_set(&tmp);
-
- printf ( "RTC: %4d-%02d-%02d %2d:%02d:%02d UTC\n",
- tmp.tm_year, tmp.tm_mon, tmp.tm_mday,
- tmp.tm_hour, tmp.tm_min, tmp.tm_sec);
-
- return;
+ return rtc_write(dev, RTC_CTL2_REG_ADDR, ctl2);
}
-
/*
* Helper functions
*/
-static void rtc_write (uchar reg, uchar val)
+static int rtc_write(struct udevice *dev, uchar reg, uchar val)
{
- uchar buf[2];
- buf[0] = reg << 4;
- buf[1] = val;
- if (i2c_write(CFG_I2C_RTC_ADDR, 0, 0, buf, 2) != 0)
+ /* The RX8025/RX8035 uses the top 4 bits of the
+ * 'offset' byte as the start register address,
+ * and the bottom 4 bits as a 'transfer' mode setting
+ * (only applicable for reads)
+ */
+ u8 offset = (reg << 4);
+
+ if (dm_i2c_reg_write(dev, offset, val)) {
printf("Error writing to RTC\n");
+ return -EIO;
+ }
+ return 0;
}
-static unsigned bcd2bin (uchar n)
+static int rx8025_probe(struct udevice *dev)
{
- return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
-}
+ uchar buf[16];
+ int ret = 0;
-static unsigned char bin2bcd (unsigned int n)
-{
- return (((n / 10) << 4) | (n % 10));
+ if (i2c_get_chip_offset_len(dev) != 1)
+ ret = i2c_set_chip_offset_len(dev, 1);
+
+ if (ret)
+ return ret;
+
+ return dm_i2c_read(dev, 0, buf, sizeof(buf));
}
-#endif /* CONFIG_RTC_RX8025 && (CFG_COMMANDS & CFG_CMD_DATE) */
+static const struct rtc_ops rx8025_rtc_ops = {
+ .get = rx8025_rtc_get,
+ .set = rx8025_rtc_set,
+ .reset = rx8025_rtc_reset,
+};
+
+static const struct udevice_id rx8025_rtc_ids[] = {
+ { .compatible = "epson,rx8025", .data = model_rx_8025 },
+ { .compatible = "epson,rx8035", .data = model_rx_8035 },
+ { }
+};
+
+U_BOOT_DRIVER(rx8025_rtc) = {
+ .name = "rx8025_rtc",
+ .id = UCLASS_RTC,
+ .probe = rx8025_probe,
+ .of_match = rx8025_rtc_ids,
+ .ops = &rx8025_rtc_ops,
+};
projects / platform / kernel / u-boot.git / blobdiff