// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2017, STMicroelectronics - All Rights Reserved
- * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics.
+ * Author(s): Patrice Chotard, <patrice.chotard@foss.st.com> for STMicroelectronics.
*/
#include <common.h>
#include <asm/io.h>
#include <linux/bitops.h>
+/* offset of register without set/clear management */
+#define RCC_MP_GCR_OFFSET 0x10C
+
/* reset clear offset for STM32MP RCC */
#define RCC_CL 0x4
reset_ctl->id, bank, offset);
if (dev_get_driver_data(reset_ctl->dev) == STM32MP1)
- /* reset assert is done in rcc set register */
- writel(BIT(offset), priv->base + bank);
+ if (bank != RCC_MP_GCR_OFFSET)
+ /* reset assert is done in rcc set register */
+ writel(BIT(offset), priv->base + bank);
+ else
+ clrbits_le32(priv->base + bank, BIT(offset));
else
setbits_le32(priv->base + bank, BIT(offset));
reset_ctl->id, bank, offset);
if (dev_get_driver_data(reset_ctl->dev) == STM32MP1)
- /* reset deassert is done in rcc clr register */
- writel(BIT(offset), priv->base + bank + RCC_CL);
+ if (bank != RCC_MP_GCR_OFFSET)
+ /* reset deassert is done in rcc clr register */
+ writel(BIT(offset), priv->base + bank + RCC_CL);
+ else
+ setbits_le32(priv->base + bank, BIT(offset));
else
clrbits_le32(priv->base + bank, BIT(offset));