return 0;
}
-static int init_mii_management_configuration(uec_t *uec_regs)
+static int init_mii_management_configuration(uec_mii_t *uec_mii_regs)
{
uint timeout = 0x1000;
u32 miimcfg = 0;
- miimcfg = in_be32(&uec_regs->miimcfg);
+ miimcfg = in_be32(&uec_mii_regs->miimcfg);
miimcfg |= MIIMCFG_MNGMNT_CLC_DIV_INIT_VALUE;
- out_be32(&uec_regs->miimcfg, miimcfg);
+ out_be32(&uec_mii_regs->miimcfg, miimcfg);
/* Wait until the bus is free */
- while ((in_be32(&uec_regs->miimcfg) & MIIMIND_BUSY) && timeout--);
+ while ((in_be32(&uec_mii_regs->miimcfg) & MIIMIND_BUSY) && timeout--);
if (timeout <= 0) {
printf("%s: The MII Bus is stuck!", __FUNCTION__);
return -ETIMEDOUT;
static int init_phy(struct eth_device *dev)
{
uec_private_t *uec;
- uec_t *uec_regs;
+ uec_mii_t *umii_regs;
struct uec_mii_info *mii_info;
struct phy_info *curphy;
int err;
uec = (uec_private_t *)dev->priv;
- uec_regs = uec->uec_regs;
+ umii_regs = uec->uec_mii_regs;
uec->oldlink = 0;
uec->oldspeed = 0;
}
memset(mii_info, 0, sizeof(*mii_info));
- mii_info->speed = SPEED_1000;
+ if (uec->uec_info->uf_info.eth_type == GIGA_ETH) {
+ mii_info->speed = SPEED_1000;
+ } else {
+ mii_info->speed = SPEED_100;
+ }
+
mii_info->duplex = DUPLEX_FULL;
mii_info->pause = 0;
mii_info->link = 1;
mii_info->mii_id = uec->uec_info->phy_address;
mii_info->dev = dev;
- mii_info->mdio_read = &read_phy_reg;
- mii_info->mdio_write = &write_phy_reg;
+ mii_info->mdio_read = &uec_read_phy_reg;
+ mii_info->mdio_write = &uec_write_phy_reg;
uec->mii_info = mii_info;
- if (init_mii_management_configuration(uec_regs)) {
+ if (init_mii_management_configuration(umii_regs)) {
printf("%s: The MII Bus is stuck!", dev->name);
err = -1;
goto bus_fail;
}
/* get info for this PHY */
- curphy = get_phy_info(uec->mii_info);
+ curphy = uec_get_phy_info(uec->mii_info);
if (!curphy) {
printf("%s: No PHY found", dev->name);
err = -1;
}
if (mii_info->speed != uec->oldspeed) {
- switch (mii_info->speed) {
+ if (uec->uec_info->uf_info.eth_type == GIGA_ETH) {
+ switch (mii_info->speed) {
case 1000:
break;
case 100:
printf("%s: Ack,Speed(%d)is illegal\n",
dev->name, mii_info->speed);
break;
+ }
}
printf("%s: Speed %dBT\n", dev->name, mii_info->speed);
/* Setup MAC interface mode */
uec_set_mac_if_mode(uec, uec_info->enet_interface);
+ /* Setup MII management base */
+#ifndef CONFIG_eTSEC_MDIO_BUS
+ uec->uec_mii_regs = (uec_mii_t *)(&uec_regs->miimcfg);
+#else
+ uec->uec_mii_regs = (uec_mii_t *) CONFIG_MIIM_ADDRESS;
+#endif
+
/* Setup MII master clock source */
qe_set_mii_clk_src(uec_info->uf_info.ucc_num);
uec_private_t *uec;
ucc_fast_private_t *uccf;
volatile qe_bd_t *bd;
- volatile u16 status;
+ u16 status;
int i;
int result = 0;
bd = uec->txBd;
/* Find an empty TxBD */
- for (i = 0; BD_STATUS(bd) & TxBD_READY; i++) {
+ for (i = 0; bd->status & TxBD_READY; i++) {
if (i > 0x100000) {
printf("%s: tx buffer not ready\n", dev->name);
return result;
/* Init TxBD */
BD_DATA_SET(bd, buf);
BD_LENGTH_SET(bd, len);
- status = BD_STATUS(bd);
+ status = bd->status;
status &= BD_WRAP;
status |= (TxBD_READY | TxBD_LAST);
BD_STATUS_SET(bd, status);
ucc_fast_transmit_on_demand(uccf);
/* Wait for buffer to be transmitted */
- status = BD_STATUS(bd);
- for (i = 0; status & TxBD_READY; i++) {
+ for (i = 0; bd->status & TxBD_READY; i++) {
if (i > 0x100000) {
printf("%s: tx error\n", dev->name);
return result;
}
- status = BD_STATUS(bd);
}
/* Ok, the buffer be transimitted */
{
uec_private_t *uec = dev->priv;
volatile qe_bd_t *bd;
- volatile u16 status;
+ u16 status;
u16 len;
u8 *data;
bd = uec->rxBd;
- status = BD_STATUS(bd);
+ status = bd->status;
while (!(status & RxBD_EMPTY)) {
if (!(status & RxBD_ERROR)) {
BD_LENGTH_SET(bd, 0);
BD_STATUS_SET(bd, status | RxBD_EMPTY);
BD_ADVANCE(bd, status, uec->p_rx_bd_ring);
- status = BD_STATUS(bd);
+ status = bd->status;
}
uec->rxBd = bd;