RISCV: configs: tizen_visionfive2: Enable USB_CONFIGFS_ACM

[platform/kernel/linux-starfive.git] / drivers / pinctrl / pinctrl-equilibrium.c

diff --git a/drivers/pinctrl/pinctrl-equilibrium.c b/drivers/pinctrl/pinctrl-equilibrium.c
index 99cf24e..5b5ddf7 100644 (file)
--- a/drivers/pinctrl/pinctrl-equilibrium.c
+++ b/drivers/pinctrl/pinctrl-equilibrium.c
@@ -32,6 +32,7 @@ static void eqbr_gpio_disable_irq(struct irq_data *d)
        raw_spin_lock_irqsave(&gctrl->lock, flags);
        writel(BIT(offset), gctrl->membase + GPIO_IRNENCLR);
        raw_spin_unlock_irqrestore(&gctrl->lock, flags);
+       gpiochip_disable_irq(gc, offset);
 }
 
 static void eqbr_gpio_enable_irq(struct irq_data *d)
@@ -42,6 +43,7 @@ static void eqbr_gpio_enable_irq(struct irq_data *d)
        unsigned long flags;
 
        gc->direction_input(gc, offset);
+       gpiochip_enable_irq(gc, offset);
        raw_spin_lock_irqsave(&gctrl->lock, flags);
        writel(BIT(offset), gctrl->membase + GPIO_IRNRNSET);
        raw_spin_unlock_irqrestore(&gctrl->lock, flags);
@@ -161,6 +163,17 @@ static void eqbr_irq_handler(struct irq_desc *desc)
        chained_irq_exit(ic, desc);
 }
 
+static const struct irq_chip eqbr_irq_chip = {
+       .name = "gpio_irq",
+       .irq_mask = eqbr_gpio_disable_irq,
+       .irq_unmask = eqbr_gpio_enable_irq,
+       .irq_ack = eqbr_gpio_ack_irq,
+       .irq_mask_ack = eqbr_gpio_mask_ack_irq,
+       .irq_set_type = eqbr_gpio_set_irq_type,
+       .flags = IRQCHIP_IMMUTABLE,
+       GPIOCHIP_IRQ_RESOURCE_HELPERS,
+};
+
 static int gpiochip_setup(struct device *dev, struct eqbr_gpio_ctrl *gctrl)
 {
        struct gpio_irq_chip *girq;
@@ -176,15 +189,8 @@ static int gpiochip_setup(struct device *dev, struct eqbr_gpio_ctrl *gctrl)
                return 0;
        }
 
-       gctrl->ic.name = "gpio_irq";
-       gctrl->ic.irq_mask = eqbr_gpio_disable_irq;
-       gctrl->ic.irq_unmask = eqbr_gpio_enable_irq;
-       gctrl->ic.irq_ack = eqbr_gpio_ack_irq;
-       gctrl->ic.irq_mask_ack = eqbr_gpio_mask_ack_irq;
-       gctrl->ic.irq_set_type = eqbr_gpio_set_irq_type;
-
        girq = &gctrl->chip.irq;
-       girq->chip = &gctrl->ic;
+       gpio_irq_chip_set_chip(girq, &eqbr_irq_chip);
        girq->parent_handler = eqbr_irq_handler;
        girq->num_parents = 1;
        girq->parents = devm_kcalloc(dev, 1, sizeof(*girq->parents), GFP_KERNEL);