common: Drop linux/bitops.h from common header

[platform/kernel/u-boot.git] / drivers / pci / pcie_xilinx.c

diff --git a/drivers/pci/pcie_xilinx.c b/drivers/pci/pcie_xilinx.c
index 6425825..713ad49 100644 (file)
--- a/drivers/pci/pcie_xilinx.c
+++ b/drivers/pci/pcie_xilinx.c
@@ -1,14 +1,14 @@
+// SPDX-License-Identifier: GPL-2.0
 /*
  * Xilinx AXI Bridge for PCI Express Driver
  *
  * Copyright (C) 2016 Imagination Technologies
- *
- * SPDX-License-Identifier:    GPL-2.0
  */
 
 #include <common.h>
 #include <dm.h>
 #include <pci.h>
+#include <linux/bitops.h>
 
 #include <asm/io.h>
 
@@ -41,7 +41,7 @@ static bool pcie_xilinx_link_up(struct xilinx_pcie *pcie)
 
 /**
  * pcie_xilinx_config_address() - Calculate the address of a config access
- * @pcie: Pointer to the PCI controller state
+ * @udev: Pointer to the PCI bus
  * @bdf: Identifies the PCIe device to access
  * @offset: The offset into the device's configuration space
  * @paddress: Pointer to the pointer to write the calculates address to
@@ -55,9 +55,10 @@ static bool pcie_xilinx_link_up(struct xilinx_pcie *pcie)
  *
  * Return: 0 on success, else -ENODEV
  */
-static int pcie_xilinx_config_address(struct xilinx_pcie *pcie, pci_dev_t bdf,
+static int pcie_xilinx_config_address(const struct udevice *udev, pci_dev_t bdf,
                                      uint offset, void **paddress)
 {
+       struct xilinx_pcie *pcie = dev_get_priv(udev);
        unsigned int bus = PCI_BUS(bdf);
        unsigned int dev = PCI_DEV(bdf);
        unsigned int func = PCI_FUNC(bdf);
@@ -97,33 +98,12 @@ static int pcie_xilinx_config_address(struct xilinx_pcie *pcie, pci_dev_t bdf,
  *
  * Return: 0 on success, else -ENODEV or -EINVAL
  */
-static int pcie_xilinx_read_config(struct udevice *bus, pci_dev_t bdf,
+static int pcie_xilinx_read_config(const struct udevice *bus, pci_dev_t bdf,
                                   uint offset, ulong *valuep,
                                   enum pci_size_t size)
 {
-       struct xilinx_pcie *pcie = dev_get_priv(bus);
-       void *address;
-       int err;
-
-       err = pcie_xilinx_config_address(pcie, bdf, offset, &address);
-       if (err < 0) {
-               *valuep = pci_get_ff(size);
-               return 0;
-       }
-
-       switch (size) {
-       case PCI_SIZE_8:
-               *valuep = __raw_readb(address);
-               return 0;
-       case PCI_SIZE_16:
-               *valuep = __raw_readw(address);
-               return 0;
-       case PCI_SIZE_32:
-               *valuep = __raw_readl(address);
-               return 0;
-       default:
-               return -EINVAL;
-       }
+       return pci_generic_mmap_read_config(bus, pcie_xilinx_config_address,
+                                           bdf, offset, valuep, size);
 }
 
 /**
@@ -144,27 +124,8 @@ static int pcie_xilinx_write_config(struct udevice *bus, pci_dev_t bdf,
                                    uint offset, ulong value,
                                    enum pci_size_t size)
 {
-       struct xilinx_pcie *pcie = dev_get_priv(bus);
-       void *address;
-       int err;
-
-       err = pcie_xilinx_config_address(pcie, bdf, offset, &address);
-       if (err < 0)
-               return 0;
-
-       switch (size) {
-       case PCI_SIZE_8:
-               __raw_writeb(value, address);
-               return 0;
-       case PCI_SIZE_16:
-               __raw_writew(value, address);
-               return 0;
-       case PCI_SIZE_32:
-               __raw_writel(value, address);
-               return 0;
-       default:
-               return -EINVAL;
-       }
+       return pci_generic_mmap_write_config(bus, pcie_xilinx_config_address,
+                                            bdf, offset, value, size);
 }
 
 /**