Prepare v2023.10

[platform/kernel/u-boot.git] / drivers / pci / pcie_layerscape.h

diff --git a/drivers/pci/pcie_layerscape.h b/drivers/pci/pcie_layerscape.h
index 0124e8e..b7f692f 100644 (file)
--- a/drivers/pci/pcie_layerscape.h
+++ b/drivers/pci/pcie_layerscape.h
@@ -10,21 +10,23 @@
 #include <pci.h>
 
 #include <linux/sizes.h>
+#include <asm/arch-fsl-layerscape/svr.h>
+#include <asm/arch-ls102xa/svr.h>
 
-#ifndef CONFIG_SYS_PCI_MEMORY_BUS
-#define CONFIG_SYS_PCI_MEMORY_BUS CONFIG_SYS_SDRAM_BASE
+#ifndef CFG_SYS_PCI_MEMORY_BUS
+#define CFG_SYS_PCI_MEMORY_BUS CFG_SYS_SDRAM_BASE
 #endif
 
-#ifndef CONFIG_SYS_PCI_MEMORY_PHYS
-#define CONFIG_SYS_PCI_MEMORY_PHYS CONFIG_SYS_SDRAM_BASE
+#ifndef CFG_SYS_PCI_MEMORY_PHYS
+#define CFG_SYS_PCI_MEMORY_PHYS CFG_SYS_SDRAM_BASE
 #endif
 
-#ifndef CONFIG_SYS_PCI_MEMORY_SIZE
-#define CONFIG_SYS_PCI_MEMORY_SIZE SZ_4G
+#ifndef CFG_SYS_PCI_MEMORY_SIZE
+#define CFG_SYS_PCI_MEMORY_SIZE SZ_4G
 #endif
 
-#ifndef CONFIG_SYS_PCI_EP_MEMORY_BASE
-#define CONFIG_SYS_PCI_EP_MEMORY_BASE CONFIG_SYS_LOAD_ADDR
+#ifndef CFG_SYS_PCI_EP_MEMORY_BASE
+#define CFG_SYS_PCI_EP_MEMORY_BASE CONFIG_SYS_LOAD_ADDR
 #endif
 
 #define PCIE_PHYS_SIZE                 0x200000000
@@ -121,16 +123,6 @@
 /* CS2 */
 #define PCIE_CS2_OFFSET                0x1000 /* For PCIe without SR-IOV */
 
-#define SVR_LS102XA            0
-#define SVR_VAR_PER_SHIFT      8
-#define SVR_LS102XA_MASK       0x700
-#define SVR_LS2088A            0x870900
-#define SVR_LS2084A            0x870910
-#define SVR_LS2048A            0x870920
-#define SVR_LS2044A            0x870930
-#define SVR_LS2081A            0x870918
-#define SVR_LS2041A            0x870914
-
 /* LS1021a PCIE space */
 #define LS1021_PCIE_SPACE_OFFSET       0x4000000000ULL
 #define LS1021_PCIE_SPACE_SIZE         0x0800000000ULL