+// SPDX-License-Identifier: GPL-2.0+
/*
* drivers/net/ravb.c
* This file is driver for Renesas Ethernet AVB.
* Copyright (C) 2015-2017 Renesas Electronics Corporation
*
* Based on the SuperH Ethernet driver.
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <clk.h>
+#include <cpu_func.h>
#include <dm.h>
#include <errno.h>
+#include <log.h>
#include <miiphy.h>
#include <malloc.h>
+#include <asm/cache.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
#include <linux/mii.h>
#include <wait_bit.h>
#include <asm/io.h>
+#include <asm/global_data.h>
#include <asm/gpio.h>
/* Registers */
#define CSR_OPS 0x0000000F
#define CSR_OPS_CONFIG BIT(1)
+#define APSR_TDM BIT(14)
+
#define TCCR_TSRQ0 BIT(0)
#define RFLR_RFL_MIN 0x05EE
writel(CCC_OPC_CONFIG, eth->iobase + RAVB_REG_CCC);
/* Check the operating mode is changed to the config mode. */
- return wait_for_bit(dev->name, (void *)eth->iobase + RAVB_REG_CSR,
- CSR_OPS_CONFIG, true, 100, true);
+ return wait_for_bit_le32(eth->iobase + RAVB_REG_CSR,
+ CSR_OPS_CONFIG, true, 100, true);
}
static void ravb_base_desc_init(struct ravb_priv *eth)
static int ravb_phy_config(struct udevice *dev)
{
struct ravb_priv *eth = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct phy_device *phydev;
int mask = 0xffffffff, reg;
eth->phydev = phydev;
- /* 10BASE is not supported for Ethernet AVB MAC */
- phydev->supported &= ~(SUPPORTED_10baseT_Full
- | SUPPORTED_10baseT_Half);
+ phydev->supported &= SUPPORTED_100baseT_Full |
+ SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg |
+ SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_Pause |
+ SUPPORTED_Asym_Pause;
+
if (pdata->max_speed != 1000) {
- phydev->supported &= ~(SUPPORTED_1000baseT_Half
- | SUPPORTED_1000baseT_Full);
+ phydev->supported &= ~SUPPORTED_1000baseT_Full;
reg = phy_read(phydev, -1, MII_CTRL1000);
reg &= ~(BIT(9) | BIT(8));
phy_write(phydev, -1, MII_CTRL1000, reg);
static int ravb_write_hwaddr(struct udevice *dev)
{
struct ravb_priv *eth = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
unsigned char *mac = pdata->enetaddr;
writel((mac[0] << 24) | (mac[1] << 16) | (mac[2] << 8) | mac[3],
static int ravb_dmac_init(struct udevice *dev)
{
struct ravb_priv *eth = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
int ret = 0;
/* Set CONFIG mode */
/* FIFO size set */
writel(0x00222210, eth->iobase + RAVB_REG_TGC);
- /* Delay CLK: 2ns */
- if (pdata->max_speed == 1000)
- writel(BIT(14), eth->iobase + RAVB_REG_APSR);
+ /* Delay CLK: 2ns (not applicable on R-Car E3/D3) */
+ if ((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77990) ||
+ (rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77995))
+ return 0;
+
+ if ((pdata->phy_interface == PHY_INTERFACE_MODE_RGMII_ID) ||
+ (pdata->phy_interface == PHY_INTERFACE_MODE_RGMII_TXID))
+ writel(APSR_TDM, eth->iobase + RAVB_REG_APSR);
return 0;
}
static int ravb_config(struct udevice *dev)
{
struct ravb_priv *eth = dev_get_priv(dev);
- struct phy_device *phy;
+ struct phy_device *phy = eth->phydev;
u32 mask = ECMR_CHG_DM | ECMR_RE | ECMR_TE;
int ret;
ravb_mac_init(eth);
ravb_write_hwaddr(dev);
- /* Configure phy */
- ret = ravb_phy_config(dev);
- if (ret)
- return ret;
-
- phy = eth->phydev;
-
ret = phy_startup(phy);
if (ret)
return ret;
writel(mask, eth->iobase + RAVB_REG_ECMR);
- phy->drv->writeext(phy, -1, 0x02, 0x08, (0x0f << 5) | 0x19);
-
return 0;
}
-int ravb_start(struct udevice *dev)
+static int ravb_start(struct udevice *dev)
{
struct ravb_priv *eth = dev_get_priv(dev);
int ret;
- ret = clk_enable(ð->clk);
- if (ret)
- return ret;
-
ret = ravb_reset(dev);
if (ret)
- goto err;
+ return ret;
ravb_base_desc_init(eth);
ravb_tx_desc_init(eth);
ret = ravb_config(dev);
if (ret)
- goto err;
+ return ret;
/* Setting the control will start the AVB-DMAC process. */
writel(CCC_OPC_OPERATION, eth->iobase + RAVB_REG_CCC);
return 0;
-
-err:
- clk_disable(ð->clk);
- return ret;
}
static void ravb_stop(struct udevice *dev)
{
struct ravb_priv *eth = dev_get_priv(dev);
+ phy_shutdown(eth->phydev);
ravb_reset(dev);
- clk_disable(ð->clk);
}
static int ravb_probe(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
struct ravb_priv *eth = dev_get_priv(dev);
+ struct ofnode_phandle_args phandle_args;
struct mii_dev *mdiodev;
void __iomem *iobase;
int ret;
if (ret < 0)
goto err_mdio_alloc;
- gpio_request_by_name_nodev(dev_ofnode(dev), "reset-gpios", 0,
- ð->reset_gpio, GPIOD_IS_OUT);
+ ret = dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0, &phandle_args);
+ if (!ret) {
+ gpio_request_by_name_nodev(phandle_args.node, "reset-gpios", 0,
+ ð->reset_gpio, GPIOD_IS_OUT);
+ }
+
+ if (!dm_gpio_is_valid(ð->reset_gpio)) {
+ gpio_request_by_name(dev, "reset-gpios", 0, ð->reset_gpio,
+ GPIOD_IS_OUT);
+ }
mdiodev = mdio_alloc();
if (!mdiodev) {
eth->bus = miiphy_get_dev_by_name(dev->name);
+ /* Bring up PHY */
+ ret = clk_enable(ð->clk);
+ if (ret)
+ goto err_mdio_register;
+
+ ret = ravb_reset(dev);
+ if (ret)
+ goto err_mdio_reset;
+
+ ret = ravb_phy_config(dev);
+ if (ret)
+ goto err_mdio_reset;
+
return 0;
+err_mdio_reset:
+ clk_disable(ð->clk);
err_mdio_register:
mdio_free(mdiodev);
err_mdio_alloc:
{
struct ravb_priv *eth = dev_get_priv(dev);
+ clk_disable(ð->clk);
+
free(eth->phydev);
mdio_unregister(eth->bus);
mdio_free(eth->bus);
- dm_gpio_free(dev, ð->reset_gpio);
+ if (dm_gpio_is_valid(ð->reset_gpio))
+ dm_gpio_free(dev, ð->reset_gpio);
unmap_physmem(eth->iobase, MAP_NOCACHE);
return 0;
.write_hwaddr = ravb_write_hwaddr,
};
-int ravb_ofdata_to_platdata(struct udevice *dev)
+int ravb_of_to_plat(struct udevice *dev)
{
- struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct eth_pdata *pdata = dev_get_plat(dev);
const char *phy_mode;
const fdt32_t *cell;
int ret = 0;
- pdata->iobase = devfdt_get_addr(dev);
+ pdata->iobase = dev_read_addr(dev);
pdata->phy_interface = -1;
phy_mode = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "phy-mode",
NULL);
static const struct udevice_id ravb_ids[] = {
{ .compatible = "renesas,etheravb-r8a7795" },
{ .compatible = "renesas,etheravb-r8a7796" },
+ { .compatible = "renesas,etheravb-r8a77965" },
+ { .compatible = "renesas,etheravb-r8a77970" },
+ { .compatible = "renesas,etheravb-r8a77990" },
+ { .compatible = "renesas,etheravb-r8a77995" },
{ .compatible = "renesas,etheravb-rcar-gen3" },
{ }
};
.name = "ravb",
.id = UCLASS_ETH,
.of_match = ravb_ids,
- .ofdata_to_platdata = ravb_ofdata_to_platdata,
+ .of_to_plat = ravb_of_to_plat,
.probe = ravb_probe,
.remove = ravb_remove,
.ops = &ravb_ops,
- .priv_auto_alloc_size = sizeof(struct ravb_priv),
- .platdata_auto_alloc_size = sizeof(struct eth_pdata),
+ .priv_auto = sizeof(struct ravb_priv),
+ .plat_auto = sizeof(struct eth_pdata),
.flags = DM_FLAG_ALLOC_PRIV_DMA,
};