Merge tag 'u-boot-atmel-fixes-2021.01-b' of https://gitlab.denx.de/u-boot/custodians...

[platform/kernel/u-boot.git] / drivers / net / phy / cortina.c

diff --git a/drivers/net/phy/cortina.c b/drivers/net/phy/cortina.c
index a04a118..b381a43 100644 (file)
--- a/drivers/net/phy/cortina.c
+++ b/drivers/net/phy/cortina.c
@@ -3,14 +3,16 @@
  * Cortina CS4315/CS4340 10G PHY drivers
  *
  * Copyright 2014 Freescale Semiconductor, Inc.
- * Copyright 2018 NXP
+ * Copyright 2018, 2020 NXP
  *
  */
 
 #include <config.h>
 #include <common.h>
+#include <log.h>
 #include <malloc.h>
 #include <linux/ctype.h>
+#include <linux/delay.h>
 #include <linux/string.h>
 #include <linux/err.h>
 #include <phy.h>
@@ -27,7 +29,7 @@
 #error The Cortina PHY needs 10G support
 #endif
 
-#ifndef CORTINA_NO_FW_UPLOAD
+#ifndef CONFIG_SYS_CORTINA_NO_FW_UPLOAD
 struct cortina_reg_config cortina_reg_cfg[] = {
        /* CS4315_enable_sr_mode */
        {VILLA_GLOBAL_MSEQCLKCTRL, 0x8004},
@@ -176,8 +178,13 @@ void cs4340_upload_firmware(struct phy_device *phydev)
                printf("MMC read: dev # %u, block # %u, count %u ...\n",
                       dev, blk, cnt);
                mmc_init(mmc);
+#ifdef CONFIG_BLK
+               (void)blk_dread(mmc_get_blk_desc(mmc), blk, cnt,
+                                               addr);
+#else
                (void)mmc->block_dev.block_read(&mmc->block_dev, blk, cnt,
                                                addr);
+#endif
        }
 #endif
 
@@ -220,7 +227,7 @@ void cs4340_upload_firmware(struct phy_device *phydev)
 
 int cs4340_phy_init(struct phy_device *phydev)
 {
-#ifndef CORTINA_NO_FW_UPLOAD
+#ifndef CONFIG_SYS_CORTINA_NO_FW_UPLOAD
        int timeout = 100;  /* 100ms */
 #endif
        int reg_value;
@@ -231,7 +238,7 @@ int cs4340_phy_init(struct phy_device *phydev)
         * Boards designed with EEPROM attached to Cortina
         * does not require FW upload.
         */
-#ifndef CORTINA_NO_FW_UPLOAD
+#ifndef CONFIG_SYS_CORTINA_NO_FW_UPLOAD
        /* step1: BIST test */
        phy_write(phydev, 0x00, VILLA_GLOBAL_MSEQCLKCTRL,     0x0004);
        phy_write(phydev, 0x00, VILLA_GLOBAL_LINE_SOFT_RESET, 0x0000);