net: pcnet: Drop PCNET_HAS_PROM

[platform/kernel/u-boot.git] / drivers / net / pcnet.c

diff --git a/drivers/net/pcnet.c b/drivers/net/pcnet.c
index 59241c9..edc4dba 100644 (file)
--- a/drivers/net/pcnet.c
+++ b/drivers/net/pcnet.c
@@ -8,11 +8,14 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <log.h>
 #include <malloc.h>
 #include <net.h>
 #include <netdev.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <pci.h>
+#include <linux/delay.h>
 
 #define        PCNET_DEBUG_LEVEL       0       /* 0=off, 1=init, 2=rx/tx */
 
@@ -73,15 +76,15 @@ struct pcnet_uncached_priv {
        struct pcnet_init_block init_block;
 };
 
-typedef struct pcnet_priv {
+struct pcnet_priv {
        struct pcnet_uncached_priv *uc;
        /* Receive Buffer space */
        unsigned char (*rx_buf)[RX_RING_SIZE][PKT_BUF_SZ + 4];
        int cur_rx;
        int cur_tx;
-} pcnet_priv_t;
+};
 
-static pcnet_priv_t *lp;
+static struct pcnet_priv *lp;
 
 /* Offsets from base I/O address for WIO mode */
 #define PCNET_RDP              0x10
@@ -91,37 +94,49 @@ static pcnet_priv_t *lp;
 
 static u16 pcnet_read_csr(struct eth_device *dev, int index)
 {
-       outw(index, dev->iobase + PCNET_RAP);
-       return inw(dev->iobase + PCNET_RDP);
+       void __iomem *base = (void __iomem *)dev->iobase;
+
+       writew(index, base + PCNET_RAP);
+       return readw(base + PCNET_RDP);
 }
 
 static void pcnet_write_csr(struct eth_device *dev, int index, u16 val)
 {
-       outw(index, dev->iobase + PCNET_RAP);
-       outw(val, dev->iobase + PCNET_RDP);
+       void __iomem *base = (void __iomem *)dev->iobase;
+
+       writew(index, base + PCNET_RAP);
+       writew(val, base + PCNET_RDP);
 }
 
 static u16 pcnet_read_bcr(struct eth_device *dev, int index)
 {
-       outw(index, dev->iobase + PCNET_RAP);
-       return inw(dev->iobase + PCNET_BDP);
+       void __iomem *base = (void __iomem *)dev->iobase;
+
+       writew(index, base + PCNET_RAP);
+       return readw(base + PCNET_BDP);
 }
 
 static void pcnet_write_bcr(struct eth_device *dev, int index, u16 val)
 {
-       outw(index, dev->iobase + PCNET_RAP);
-       outw(val, dev->iobase + PCNET_BDP);
+       void __iomem *base = (void __iomem *)dev->iobase;
+
+       writew(index, base + PCNET_RAP);
+       writew(val, base + PCNET_BDP);
 }
 
 static void pcnet_reset(struct eth_device *dev)
 {
-       inw(dev->iobase + PCNET_RESET);
+       void __iomem *base = (void __iomem *)dev->iobase;
+
+       readw(base + PCNET_RESET);
 }
 
 static int pcnet_check(struct eth_device *dev)
 {
-       outw(88, dev->iobase + PCNET_RAP);
-       return inw(dev->iobase + PCNET_RAP) == 88;
+       void __iomem *base = (void __iomem *)dev->iobase;
+
+       writew(88, base + PCNET_RAP);
+       return readw(base + PCNET_RAP) == 88;
 }
 
 static int pcnet_init (struct eth_device *dev, bd_t * bis);
@@ -179,14 +194,14 @@ int pcnet_initialize(bd_t *bis)
                /*
                 * Setup the PCI device.
                 */
-               pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_0, &bar);
-               dev->iobase = pci_io_to_phys(devbusfn, bar);
+               pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_1, &bar);
+               dev->iobase = pci_mem_to_phys(devbusfn, bar);
                dev->iobase &= ~0xf;
 
                PCNET_DEBUG1("%s: devbusfn=0x%x iobase=0x%lx: ",
                             dev->name, devbusfn, (unsigned long)dev->iobase);
 
-               command = PCI_COMMAND_IO | PCI_COMMAND_MASTER;
+               command = PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER;
                pci_write_config_word(devbusfn, PCI_COMMAND, command);
                pci_read_config_word(devbusfn, PCI_COMMAND, &status);
                if ((status & command) != command) {
@@ -226,10 +241,7 @@ static int pcnet_probe(struct eth_device *dev, bd_t *bis, int dev_nr)
 {
        int chip_version;
        char *chipname;
-
-#ifdef PCNET_HAS_PROM
        int i;
-#endif
 
        /* Reset the PCnet controller */
        pcnet_reset(dev);
@@ -264,7 +276,6 @@ static int pcnet_probe(struct eth_device *dev, bd_t *bis, int dev_nr)
 
        PCNET_DEBUG1("AMD %s\n", chipname);
 
-#ifdef PCNET_HAS_PROM
        /*
         * In most chips, after a chip reset, the ethernet address is read from
         * the station address PROM at the base address and programmed into the
@@ -278,7 +289,6 @@ static int pcnet_probe(struct eth_device *dev, bd_t *bis, int dev_nr)
                dev->enetaddr[2 * i] = val & 0x0ff;
                dev->enetaddr[2 * i + 1] = (val >> 8) & 0x0ff;
        }
-#endif /* PCNET_HAS_PROM */
 
        return 0;
 }
@@ -325,14 +335,16 @@ static int pcnet_init(struct eth_device *dev, bd_t *bis)
         * must be aligned on 16-byte boundaries.
         */
        if (lp == NULL) {
-               addr = (unsigned long)malloc(sizeof(pcnet_priv_t) + 0x10);
+               addr = (unsigned long)malloc(sizeof(*lp) + 0x10);
                addr = (addr + 0xf) & ~0xf;
-               lp = (pcnet_priv_t *)addr;
+               lp = (struct pcnet_priv *)addr;
 
                addr = (unsigned long)memalign(ARCH_DMA_MINALIGN,
                                               sizeof(*lp->uc));
                flush_dcache_range(addr, addr + sizeof(*lp->uc));
-               addr = UNCACHED_SDRAM(addr);
+               addr = (unsigned long)map_physmem(addr,
+                               roundup(sizeof(*lp->uc), ARCH_DMA_MINALIGN),
+                               MAP_NOCACHE);
                lp->uc = (struct pcnet_uncached_priv *)addr;
 
                addr = (unsigned long)memalign(ARCH_DMA_MINALIGN,