zlib: Add further watchdog reset calls

[platform/kernel/u-boot.git] / drivers / net / ns8382x.c

diff --git a/drivers/net/ns8382x.c b/drivers/net/ns8382x.c
index c807dd4..198f73d 100644 (file)
--- a/drivers/net/ns8382x.c
+++ b/drivers/net/ns8382x.c
@@ -53,12 +53,10 @@
 #include <common.h>
 #include <malloc.h>
 #include <net.h>
+#include <netdev.h>
 #include <asm/io.h>
 #include <pci.h>
 
-#if defined(CONFIG_CMD_NET) \
-       && defined(CONFIG_NET_MULTI) && defined(CONFIG_NS8382X)
-
 /* defines */
 #define DSIZE     0x00000FFF
 #define ETH_ALEN               6
@@ -447,7 +445,7 @@ ns8382x_initialize(bd_t * bis)
        Read and write MII registers using software-generated serial MDIO
        protocol.  See the MII specifications or DP83840A data sheet for details.
 
-       The maximum data clock rate is 2.5 Mhz.  To meet minimum timing we
+       The maximum data clock rate is 2.5 MHz.  To meet minimum timing we
        must flush writes to the PCI bus with a PCI read. */
 #define mdio_delay(mdio_addr) INL(dev, mdio_addr)
 
@@ -773,14 +771,14 @@ ns8382x_send(struct eth_device *dev, volatile void *packet, int length)
 
        for (i = 0; (tx_stat = le32_to_cpu(txd.cmdsts)) & DescOwn; i++) {
                if (i >= TOUT_LOOP) {
-                       printf ("%s: tx error buffer not ready: txd.cmdsts %#X\n",
+                       printf ("%s: tx error buffer not ready: txd.cmdsts %#lX\n",
                             dev->name, tx_stat);
                        goto Done;
                }
        }
 
        if (!(tx_stat & DescPktOK)) {
-               printf("ns8382x_send: Transmit error, Tx status %X.\n", tx_stat);
+               printf("ns8382x_send: Transmit error, Tx status %lX.\n", tx_stat);
                goto Done;
        }
 #ifdef NS8382X_DEBUG
@@ -859,5 +857,3 @@ ns8382x_disable(struct eth_device *dev)
        /* Restore PME enable bit */
        OUTL(dev, SavedClkRun, ClkRun);
 }
-
-#endif