// SPDX-License-Identifier: GPL-2.0+
/*
- * Copyright 2018 NXP
+ * Copyright 2018, 2020 NXP
*/
#include <common.h>
#include <phy.h>
static int is_device_disabled(int dpmac_id)
{
- struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR;
+ struct ccsr_gur __iomem *gur = (void *)CFG_SYS_FSL_GUTS_ADDR;
u32 devdisr2 = in_le32(&gur->devdisr2);
return dpmac_to_devdisr[dpmac_id] & devdisr2;
void wriop_dpmac_disable(int dpmac_id)
{
- struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR;
+ struct ccsr_gur __iomem *gur = (void *)CFG_SYS_FSL_GUTS_ADDR;
setbits_le32(&gur->devdisr2, dpmac_to_devdisr[dpmac_id]);
}
void wriop_dpmac_enable(int dpmac_id)
{
- struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR;
+ struct ccsr_gur __iomem *gur = (void *)CFG_SYS_FSL_GUTS_ADDR;
clrbits_le32(&gur->devdisr2, dpmac_to_devdisr[dpmac_id]);
}
{
enum srds_prtcl;
- if (is_device_disabled(dpmac_id + 1))
- return PHY_INTERFACE_MODE_NONE;
+ if (is_device_disabled(dpmac_id))
+ return PHY_INTERFACE_MODE_NA;
if (lane_prtcl >= SGMII1 && lane_prtcl <= SGMII18)
return PHY_INTERFACE_MODE_SGMII;
if (lane_prtcl >= _100GE1 && lane_prtcl <= _100GE2)
return PHY_INTERFACE_MODE_CAUI4;
- return PHY_INTERFACE_MODE_NONE;
+ return PHY_INTERFACE_MODE_NA;
}
#ifdef CONFIG_SYS_FSL_HAS_RGMII
void fsl_rgmii_init(void)
{
- struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
+ struct ccsr_gur __iomem *gur = (void *)(CFG_SYS_FSL_GUTS_ADDR);
u32 ec;
#ifdef CONFIG_SYS_FSL_EC1
& FSL_CHASSIS3_EC1_REGSR_PRTCL_MASK;
ec >>= FSL_CHASSIS3_EC1_REGSR_PRTCL_SHIFT;
- if (!ec && (wriop_is_enabled_dpmac(17) == -ENODEV))
+ if (!ec)
wriop_init_dpmac_enet_if(17, PHY_INTERFACE_MODE_RGMII_ID);
#endif
& FSL_CHASSIS3_EC2_REGSR_PRTCL_MASK;
ec >>= FSL_CHASSIS3_EC2_REGSR_PRTCL_SHIFT;
- if (!ec && (wriop_is_enabled_dpmac(18) == -ENODEV))
+ if (!ec)
wriop_init_dpmac_enet_if(18, PHY_INTERFACE_MODE_RGMII_ID);
#endif
}