+/* SPDX-License-Identifier: GPL-2.0+ */
/*
- * Copyright (C) 2014 Freescale Semiconductor
- *
- * SPDX-License-Identifier: GPL-2.0+
+ * Copyright 2014-2016 Freescale Semiconductor, Inc.
+ * Copyright 2017 NXP
*/
#ifndef __LDPAA_ETH_H
};
/* Arbitrary values for now, but we'll need to tune */
-#define LDPAA_ETH_NUM_BUFS (2 * 7)
+#define LDPAA_ETH_NUM_BUFS (7 * 7)
#define LDPAA_ETH_REFILL_THRESH (LDPAA_ETH_NUM_BUFS/2)
#define LDPAA_ETH_RX_BUFFER_SIZE 2048
LDPAA_ETH_FAS_TIDE)
struct ldpaa_eth_priv {
+#ifdef CONFIG_DM_ETH
+ struct phy_device *phy;
+ int phy_mode;
+ bool started;
+#else
struct eth_device *net_dev;
- int dpmac_id;
+#endif
+ uint32_t dpmac_id;
uint16_t dpmac_handle;
uint16_t tx_data_offset;
uint16_t tx_flow_id;
enum ldpaa_eth_type type; /* 1G or 10G ethernet */
- struct phy_device *phydev;
};
struct dprc_endpoint dpmac_endpoint;