Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
[platform/kernel/linux-rpi.git] / drivers / net / dsa / mv88e6xxx / chip.c
index 5bcdd33..7fa19d4 100644 (file)
@@ -810,31 +810,40 @@ static void mv88e6xxx_get_regs(struct dsa_switch *ds, int port,
        mutex_unlock(&chip->reg_lock);
 }
 
-static int mv88e6xxx_get_eee(struct dsa_switch *ds, int port,
-                            struct ethtool_eee *e)
+static int mv88e6xxx_energy_detect_read(struct mv88e6xxx_chip *chip, int port,
+                                       struct ethtool_eee *eee)
 {
-       struct mv88e6xxx_chip *chip = ds->priv;
-       u16 reg;
        int err;
 
-       if (!mv88e6xxx_has(chip, MV88E6XXX_FLAG_EEE))
+       if (!chip->info->ops->phy_energy_detect_read)
                return -EOPNOTSUPP;
 
-       mutex_lock(&chip->reg_lock);
-
-       err = mv88e6xxx_phy_read(chip, port, 16, &reg);
+       /* assign eee->eee_enabled and eee->tx_lpi_enabled */
+       err = chip->info->ops->phy_energy_detect_read(chip, port, eee);
        if (err)
-               goto out;
+               return err;
 
-       e->eee_enabled = !!(reg & 0x0200);
-       e->tx_lpi_enabled = !!(reg & 0x0100);
+       /* assign eee->eee_active */
+       return mv88e6xxx_port_status_eee(chip, port, eee);
+}
 
-       err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_STS, &reg);
-       if (err)
-               goto out;
+static int mv88e6xxx_energy_detect_write(struct mv88e6xxx_chip *chip, int port,
+                                        struct ethtool_eee *eee)
+{
+       if (!chip->info->ops->phy_energy_detect_write)
+               return -EOPNOTSUPP;
 
-       e->eee_active = !!(reg & MV88E6352_PORT_STS_EEE);
-out:
+       return chip->info->ops->phy_energy_detect_write(chip, port, eee);
+}
+
+static int mv88e6xxx_get_eee(struct dsa_switch *ds, int port,
+                            struct ethtool_eee *e)
+{
+       struct mv88e6xxx_chip *chip = ds->priv;
+       int err;
+
+       mutex_lock(&chip->reg_lock);
+       err = mv88e6xxx_energy_detect_read(chip, port, e);
        mutex_unlock(&chip->reg_lock);
 
        return err;
@@ -844,26 +853,10 @@ static int mv88e6xxx_set_eee(struct dsa_switch *ds, int port,
                             struct phy_device *phydev, struct ethtool_eee *e)
 {
        struct mv88e6xxx_chip *chip = ds->priv;
-       u16 reg;
        int err;
 
-       if (!mv88e6xxx_has(chip, MV88E6XXX_FLAG_EEE))
-               return -EOPNOTSUPP;
-
        mutex_lock(&chip->reg_lock);
-
-       err = mv88e6xxx_phy_read(chip, port, 16, &reg);
-       if (err)
-               goto out;
-
-       reg &= ~0x0300;
-       if (e->eee_enabled)
-               reg |= 0x0200;
-       if (e->tx_lpi_enabled)
-               reg |= 0x0100;
-
-       err = mv88e6xxx_phy_write(chip, port, 16, reg);
-out:
+       err = mv88e6xxx_energy_detect_write(chip, port, e);
        mutex_unlock(&chip->reg_lock);
 
        return err;
@@ -926,6 +919,22 @@ static void mv88e6xxx_port_stp_state_set(struct dsa_switch *ds, int port,
                dev_err(ds->dev, "p%d: failed to update state\n", port);
 }
 
+static int mv88e6xxx_pot_setup(struct mv88e6xxx_chip *chip)
+{
+       if (chip->info->ops->pot_clear)
+               return chip->info->ops->pot_clear(chip);
+
+       return 0;
+}
+
+static int mv88e6xxx_rsvd2cpu_setup(struct mv88e6xxx_chip *chip)
+{
+       if (chip->info->ops->mgmt_rsvd2cpu)
+               return chip->info->ops->mgmt_rsvd2cpu(chip);
+
+       return 0;
+}
+
 static int mv88e6xxx_atu_setup(struct mv88e6xxx_chip *chip)
 {
        int err;
@@ -2116,7 +2125,7 @@ static int mv88e6xxx_setup(struct dsa_switch *ds)
                goto unlock;
 
        /* Setup Switch Global 2 Registers */
-       if (mv88e6xxx_has(chip, MV88E6XXX_FLAG_GLOBAL2)) {
+       if (chip->info->global2_addr) {
                err = mv88e6xxx_g2_setup(chip);
                if (err)
                        goto unlock;
@@ -2142,16 +2151,13 @@ static int mv88e6xxx_setup(struct dsa_switch *ds)
        if (err)
                goto unlock;
 
-       /* Some generations have the configuration of sending reserved
-        * management frames to the CPU in global2, others in
-        * global1. Hence it does not fit the two setup functions
-        * above.
-        */
-       if (chip->info->ops->mgmt_rsvd2cpu) {
-               err = chip->info->ops->mgmt_rsvd2cpu(chip);
-               if (err)
-                       goto unlock;
-       }
+       err = mv88e6xxx_pot_setup(chip);
+       if (err)
+               goto unlock;
+
+       err = mv88e6xxx_rsvd2cpu_setup(chip);
+       if (err)
+               goto unlock;
 
 unlock:
        mutex_unlock(&chip->reg_lock);
@@ -2385,7 +2391,8 @@ static const struct mv88e6xxx_ops mv88e6085_ops = {
        .set_cpu_port = mv88e6095_g1_set_cpu_port,
        .set_egress_port = mv88e6095_g1_set_egress_port,
        .watchdog_ops = &mv88e6097_watchdog_ops,
-       .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu,
+       .mgmt_rsvd2cpu = mv88e6352_g2_mgmt_rsvd2cpu,
+       .pot_clear = mv88e6xxx_g2_pot_clear,
        .ppu_enable = mv88e6185_g1_ppu_enable,
        .ppu_disable = mv88e6185_g1_ppu_disable,
        .reset = mv88e6185_g1_reset,
@@ -2408,7 +2415,7 @@ static const struct mv88e6xxx_ops mv88e6095_ops = {
        .stats_get_sset_count = mv88e6095_stats_get_sset_count,
        .stats_get_strings = mv88e6095_stats_get_strings,
        .stats_get_stats = mv88e6095_stats_get_stats,
-       .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu,
+       .mgmt_rsvd2cpu = mv88e6185_g2_mgmt_rsvd2cpu,
        .ppu_enable = mv88e6185_g1_ppu_enable,
        .ppu_disable = mv88e6185_g1_ppu_disable,
        .reset = mv88e6185_g1_reset,
@@ -2441,7 +2448,8 @@ static const struct mv88e6xxx_ops mv88e6097_ops = {
        .set_cpu_port = mv88e6095_g1_set_cpu_port,
        .set_egress_port = mv88e6095_g1_set_egress_port,
        .watchdog_ops = &mv88e6097_watchdog_ops,
-       .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu,
+       .mgmt_rsvd2cpu = mv88e6352_g2_mgmt_rsvd2cpu,
+       .pot_clear = mv88e6xxx_g2_pot_clear,
        .reset = mv88e6352_g1_reset,
        .vtu_getnext = mv88e6352_g1_vtu_getnext,
        .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,
@@ -2467,7 +2475,8 @@ static const struct mv88e6xxx_ops mv88e6123_ops = {
        .set_cpu_port = mv88e6095_g1_set_cpu_port,
        .set_egress_port = mv88e6095_g1_set_egress_port,
        .watchdog_ops = &mv88e6097_watchdog_ops,
-       .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu,
+       .mgmt_rsvd2cpu = mv88e6352_g2_mgmt_rsvd2cpu,
+       .pot_clear = mv88e6xxx_g2_pot_clear,
        .reset = mv88e6352_g1_reset,
        .vtu_getnext = mv88e6352_g1_vtu_getnext,
        .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,
@@ -2496,7 +2505,7 @@ static const struct mv88e6xxx_ops mv88e6131_ops = {
        .set_cpu_port = mv88e6095_g1_set_cpu_port,
        .set_egress_port = mv88e6095_g1_set_egress_port,
        .watchdog_ops = &mv88e6097_watchdog_ops,
-       .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu,
+       .mgmt_rsvd2cpu = mv88e6185_g2_mgmt_rsvd2cpu,
        .ppu_enable = mv88e6185_g1_ppu_enable,
        .ppu_disable = mv88e6185_g1_ppu_disable,
        .reset = mv88e6185_g1_reset,
@@ -2512,6 +2521,8 @@ static const struct mv88e6xxx_ops mv88e6141_ops = {
        .set_switch_mac = mv88e6xxx_g2_set_switch_mac,
        .phy_read = mv88e6xxx_g2_smi_phy_read,
        .phy_write = mv88e6xxx_g2_smi_phy_write,
+       .phy_energy_detect_read = mv88e6352_phy_energy_detect_read,
+       .phy_energy_detect_write = mv88e6352_phy_energy_detect_write,
        .port_set_link = mv88e6xxx_port_set_link,
        .port_set_duplex = mv88e6xxx_port_set_duplex,
        .port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay,
@@ -2533,6 +2544,7 @@ static const struct mv88e6xxx_ops mv88e6141_ops = {
        .set_egress_port = mv88e6390_g1_set_egress_port,
        .watchdog_ops = &mv88e6390_watchdog_ops,
        .mgmt_rsvd2cpu =  mv88e6390_g1_mgmt_rsvd2cpu,
+       .pot_clear = mv88e6xxx_g2_pot_clear,
        .reset = mv88e6352_g1_reset,
        .vtu_getnext = mv88e6352_g1_vtu_getnext,
        .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,
@@ -2563,7 +2575,8 @@ static const struct mv88e6xxx_ops mv88e6161_ops = {
        .set_cpu_port = mv88e6095_g1_set_cpu_port,
        .set_egress_port = mv88e6095_g1_set_egress_port,
        .watchdog_ops = &mv88e6097_watchdog_ops,
-       .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu,
+       .mgmt_rsvd2cpu = mv88e6352_g2_mgmt_rsvd2cpu,
+       .pot_clear = mv88e6xxx_g2_pot_clear,
        .reset = mv88e6352_g1_reset,
        .vtu_getnext = mv88e6352_g1_vtu_getnext,
        .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,
@@ -2587,7 +2600,8 @@ static const struct mv88e6xxx_ops mv88e6165_ops = {
        .set_cpu_port = mv88e6095_g1_set_cpu_port,
        .set_egress_port = mv88e6095_g1_set_egress_port,
        .watchdog_ops = &mv88e6097_watchdog_ops,
-       .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu,
+       .mgmt_rsvd2cpu = mv88e6352_g2_mgmt_rsvd2cpu,
+       .pot_clear = mv88e6xxx_g2_pot_clear,
        .reset = mv88e6352_g1_reset,
        .vtu_getnext = mv88e6352_g1_vtu_getnext,
        .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,
@@ -2619,7 +2633,8 @@ static const struct mv88e6xxx_ops mv88e6171_ops = {
        .set_cpu_port = mv88e6095_g1_set_cpu_port,
        .set_egress_port = mv88e6095_g1_set_egress_port,
        .watchdog_ops = &mv88e6097_watchdog_ops,
-       .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu,
+       .mgmt_rsvd2cpu = mv88e6352_g2_mgmt_rsvd2cpu,
+       .pot_clear = mv88e6xxx_g2_pot_clear,
        .reset = mv88e6352_g1_reset,
        .vtu_getnext = mv88e6352_g1_vtu_getnext,
        .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,
@@ -2633,6 +2648,8 @@ static const struct mv88e6xxx_ops mv88e6172_ops = {
        .set_switch_mac = mv88e6xxx_g2_set_switch_mac,
        .phy_read = mv88e6xxx_g2_smi_phy_read,
        .phy_write = mv88e6xxx_g2_smi_phy_write,
+       .phy_energy_detect_read = mv88e6352_phy_energy_detect_read,
+       .phy_energy_detect_write = mv88e6352_phy_energy_detect_write,
        .port_set_link = mv88e6xxx_port_set_link,
        .port_set_duplex = mv88e6xxx_port_set_duplex,
        .port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay,
@@ -2653,7 +2670,8 @@ static const struct mv88e6xxx_ops mv88e6172_ops = {
        .set_cpu_port = mv88e6095_g1_set_cpu_port,
        .set_egress_port = mv88e6095_g1_set_egress_port,
        .watchdog_ops = &mv88e6097_watchdog_ops,
-       .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu,
+       .mgmt_rsvd2cpu = mv88e6352_g2_mgmt_rsvd2cpu,
+       .pot_clear = mv88e6xxx_g2_pot_clear,
        .reset = mv88e6352_g1_reset,
        .vtu_getnext = mv88e6352_g1_vtu_getnext,
        .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,
@@ -2686,7 +2704,8 @@ static const struct mv88e6xxx_ops mv88e6175_ops = {
        .set_cpu_port = mv88e6095_g1_set_cpu_port,
        .set_egress_port = mv88e6095_g1_set_egress_port,
        .watchdog_ops = &mv88e6097_watchdog_ops,
-       .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu,
+       .mgmt_rsvd2cpu = mv88e6352_g2_mgmt_rsvd2cpu,
+       .pot_clear = mv88e6xxx_g2_pot_clear,
        .reset = mv88e6352_g1_reset,
        .vtu_getnext = mv88e6352_g1_vtu_getnext,
        .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,
@@ -2700,6 +2719,8 @@ static const struct mv88e6xxx_ops mv88e6176_ops = {
        .set_switch_mac = mv88e6xxx_g2_set_switch_mac,
        .phy_read = mv88e6xxx_g2_smi_phy_read,
        .phy_write = mv88e6xxx_g2_smi_phy_write,
+       .phy_energy_detect_read = mv88e6352_phy_energy_detect_read,
+       .phy_energy_detect_write = mv88e6352_phy_energy_detect_write,
        .port_set_link = mv88e6xxx_port_set_link,
        .port_set_duplex = mv88e6xxx_port_set_duplex,
        .port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay,
@@ -2720,7 +2741,8 @@ static const struct mv88e6xxx_ops mv88e6176_ops = {
        .set_cpu_port = mv88e6095_g1_set_cpu_port,
        .set_egress_port = mv88e6095_g1_set_egress_port,
        .watchdog_ops = &mv88e6097_watchdog_ops,
-       .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu,
+       .mgmt_rsvd2cpu = mv88e6352_g2_mgmt_rsvd2cpu,
+       .pot_clear = mv88e6xxx_g2_pot_clear,
        .reset = mv88e6352_g1_reset,
        .vtu_getnext = mv88e6352_g1_vtu_getnext,
        .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,
@@ -2746,7 +2768,7 @@ static const struct mv88e6xxx_ops mv88e6185_ops = {
        .set_cpu_port = mv88e6095_g1_set_cpu_port,
        .set_egress_port = mv88e6095_g1_set_egress_port,
        .watchdog_ops = &mv88e6097_watchdog_ops,
-       .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu,
+       .mgmt_rsvd2cpu = mv88e6185_g2_mgmt_rsvd2cpu,
        .ppu_enable = mv88e6185_g1_ppu_enable,
        .ppu_disable = mv88e6185_g1_ppu_disable,
        .reset = mv88e6185_g1_reset,
@@ -2762,6 +2784,8 @@ static const struct mv88e6xxx_ops mv88e6190_ops = {
        .set_switch_mac = mv88e6xxx_g2_set_switch_mac,
        .phy_read = mv88e6xxx_g2_smi_phy_read,
        .phy_write = mv88e6xxx_g2_smi_phy_write,
+       .phy_energy_detect_read = mv88e6390_phy_energy_detect_read,
+       .phy_energy_detect_write = mv88e6390_phy_energy_detect_write,
        .port_set_link = mv88e6xxx_port_set_link,
        .port_set_duplex = mv88e6xxx_port_set_duplex,
        .port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay,
@@ -2782,6 +2806,7 @@ static const struct mv88e6xxx_ops mv88e6190_ops = {
        .set_egress_port = mv88e6390_g1_set_egress_port,
        .watchdog_ops = &mv88e6390_watchdog_ops,
        .mgmt_rsvd2cpu = mv88e6390_g1_mgmt_rsvd2cpu,
+       .pot_clear = mv88e6xxx_g2_pot_clear,
        .reset = mv88e6352_g1_reset,
        .vtu_getnext = mv88e6390_g1_vtu_getnext,
        .vtu_loadpurge = mv88e6390_g1_vtu_loadpurge,
@@ -2796,6 +2821,8 @@ static const struct mv88e6xxx_ops mv88e6190x_ops = {
        .set_switch_mac = mv88e6xxx_g2_set_switch_mac,
        .phy_read = mv88e6xxx_g2_smi_phy_read,
        .phy_write = mv88e6xxx_g2_smi_phy_write,
+       .phy_energy_detect_read = mv88e6390_phy_energy_detect_read,
+       .phy_energy_detect_write = mv88e6390_phy_energy_detect_write,
        .port_set_link = mv88e6xxx_port_set_link,
        .port_set_duplex = mv88e6xxx_port_set_duplex,
        .port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay,
@@ -2816,6 +2843,7 @@ static const struct mv88e6xxx_ops mv88e6190x_ops = {
        .set_egress_port = mv88e6390_g1_set_egress_port,
        .watchdog_ops = &mv88e6390_watchdog_ops,
        .mgmt_rsvd2cpu = mv88e6390_g1_mgmt_rsvd2cpu,
+       .pot_clear = mv88e6xxx_g2_pot_clear,
        .reset = mv88e6352_g1_reset,
        .vtu_getnext = mv88e6390_g1_vtu_getnext,
        .vtu_loadpurge = mv88e6390_g1_vtu_loadpurge,
@@ -2830,6 +2858,8 @@ static const struct mv88e6xxx_ops mv88e6191_ops = {
        .set_switch_mac = mv88e6xxx_g2_set_switch_mac,
        .phy_read = mv88e6xxx_g2_smi_phy_read,
        .phy_write = mv88e6xxx_g2_smi_phy_write,
+       .phy_energy_detect_read = mv88e6390_phy_energy_detect_read,
+       .phy_energy_detect_write = mv88e6390_phy_energy_detect_write,
        .port_set_link = mv88e6xxx_port_set_link,
        .port_set_duplex = mv88e6xxx_port_set_duplex,
        .port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay,
@@ -2850,6 +2880,7 @@ static const struct mv88e6xxx_ops mv88e6191_ops = {
        .set_egress_port = mv88e6390_g1_set_egress_port,
        .watchdog_ops = &mv88e6390_watchdog_ops,
        .mgmt_rsvd2cpu = mv88e6390_g1_mgmt_rsvd2cpu,
+       .pot_clear = mv88e6xxx_g2_pot_clear,
        .reset = mv88e6352_g1_reset,
        .vtu_getnext = mv88e6390_g1_vtu_getnext,
        .vtu_loadpurge = mv88e6390_g1_vtu_loadpurge,
@@ -2864,6 +2895,8 @@ static const struct mv88e6xxx_ops mv88e6240_ops = {
        .set_switch_mac = mv88e6xxx_g2_set_switch_mac,
        .phy_read = mv88e6xxx_g2_smi_phy_read,
        .phy_write = mv88e6xxx_g2_smi_phy_write,
+       .phy_energy_detect_read = mv88e6352_phy_energy_detect_read,
+       .phy_energy_detect_write = mv88e6352_phy_energy_detect_write,
        .port_set_link = mv88e6xxx_port_set_link,
        .port_set_duplex = mv88e6xxx_port_set_duplex,
        .port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay,
@@ -2884,7 +2917,8 @@ static const struct mv88e6xxx_ops mv88e6240_ops = {
        .set_cpu_port = mv88e6095_g1_set_cpu_port,
        .set_egress_port = mv88e6095_g1_set_egress_port,
        .watchdog_ops = &mv88e6097_watchdog_ops,
-       .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu,
+       .mgmt_rsvd2cpu = mv88e6352_g2_mgmt_rsvd2cpu,
+       .pot_clear = mv88e6xxx_g2_pot_clear,
        .reset = mv88e6352_g1_reset,
        .vtu_getnext = mv88e6352_g1_vtu_getnext,
        .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,
@@ -2899,6 +2933,8 @@ static const struct mv88e6xxx_ops mv88e6290_ops = {
        .set_switch_mac = mv88e6xxx_g2_set_switch_mac,
        .phy_read = mv88e6xxx_g2_smi_phy_read,
        .phy_write = mv88e6xxx_g2_smi_phy_write,
+       .phy_energy_detect_read = mv88e6390_phy_energy_detect_read,
+       .phy_energy_detect_write = mv88e6390_phy_energy_detect_write,
        .port_set_link = mv88e6xxx_port_set_link,
        .port_set_duplex = mv88e6xxx_port_set_duplex,
        .port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay,
@@ -2920,6 +2956,7 @@ static const struct mv88e6xxx_ops mv88e6290_ops = {
        .set_egress_port = mv88e6390_g1_set_egress_port,
        .watchdog_ops = &mv88e6390_watchdog_ops,
        .mgmt_rsvd2cpu = mv88e6390_g1_mgmt_rsvd2cpu,
+       .pot_clear = mv88e6xxx_g2_pot_clear,
        .reset = mv88e6352_g1_reset,
        .vtu_getnext = mv88e6390_g1_vtu_getnext,
        .vtu_loadpurge = mv88e6390_g1_vtu_loadpurge,
@@ -2934,6 +2971,8 @@ static const struct mv88e6xxx_ops mv88e6320_ops = {
        .set_switch_mac = mv88e6xxx_g2_set_switch_mac,
        .phy_read = mv88e6xxx_g2_smi_phy_read,
        .phy_write = mv88e6xxx_g2_smi_phy_write,
+       .phy_energy_detect_read = mv88e6352_phy_energy_detect_read,
+       .phy_energy_detect_write = mv88e6352_phy_energy_detect_write,
        .port_set_link = mv88e6xxx_port_set_link,
        .port_set_duplex = mv88e6xxx_port_set_duplex,
        .port_set_speed = mv88e6185_port_set_speed,
@@ -2952,20 +2991,23 @@ static const struct mv88e6xxx_ops mv88e6320_ops = {
        .stats_get_stats = mv88e6320_stats_get_stats,
        .set_cpu_port = mv88e6095_g1_set_cpu_port,
        .set_egress_port = mv88e6095_g1_set_egress_port,
-       .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu,
+       .mgmt_rsvd2cpu = mv88e6352_g2_mgmt_rsvd2cpu,
+       .pot_clear = mv88e6xxx_g2_pot_clear,
        .reset = mv88e6352_g1_reset,
        .vtu_getnext = mv88e6185_g1_vtu_getnext,
        .vtu_loadpurge = mv88e6185_g1_vtu_loadpurge,
 };
 
 static const struct mv88e6xxx_ops mv88e6321_ops = {
-       /* MV88E6XXX_FAMILY_6321 */
+       /* MV88E6XXX_FAMILY_6320 */
        .irl_init_all = mv88e6352_g2_irl_init_all,
        .get_eeprom = mv88e6xxx_g2_get_eeprom16,
        .set_eeprom = mv88e6xxx_g2_set_eeprom16,
        .set_switch_mac = mv88e6xxx_g2_set_switch_mac,
        .phy_read = mv88e6xxx_g2_smi_phy_read,
        .phy_write = mv88e6xxx_g2_smi_phy_write,
+       .phy_energy_detect_read = mv88e6352_phy_energy_detect_read,
+       .phy_energy_detect_write = mv88e6352_phy_energy_detect_write,
        .port_set_link = mv88e6xxx_port_set_link,
        .port_set_duplex = mv88e6xxx_port_set_duplex,
        .port_set_speed = mv88e6185_port_set_speed,
@@ -2997,6 +3039,8 @@ static const struct mv88e6xxx_ops mv88e6341_ops = {
        .set_switch_mac = mv88e6xxx_g2_set_switch_mac,
        .phy_read = mv88e6xxx_g2_smi_phy_read,
        .phy_write = mv88e6xxx_g2_smi_phy_write,
+       .phy_energy_detect_read = mv88e6352_phy_energy_detect_read,
+       .phy_energy_detect_write = mv88e6352_phy_energy_detect_write,
        .port_set_link = mv88e6xxx_port_set_link,
        .port_set_duplex = mv88e6xxx_port_set_duplex,
        .port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay,
@@ -3018,6 +3062,7 @@ static const struct mv88e6xxx_ops mv88e6341_ops = {
        .set_egress_port = mv88e6390_g1_set_egress_port,
        .watchdog_ops = &mv88e6390_watchdog_ops,
        .mgmt_rsvd2cpu =  mv88e6390_g1_mgmt_rsvd2cpu,
+       .pot_clear = mv88e6xxx_g2_pot_clear,
        .reset = mv88e6352_g1_reset,
        .vtu_getnext = mv88e6352_g1_vtu_getnext,
        .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,
@@ -3049,7 +3094,8 @@ static const struct mv88e6xxx_ops mv88e6350_ops = {
        .set_cpu_port = mv88e6095_g1_set_cpu_port,
        .set_egress_port = mv88e6095_g1_set_egress_port,
        .watchdog_ops = &mv88e6097_watchdog_ops,
-       .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu,
+       .mgmt_rsvd2cpu = mv88e6352_g2_mgmt_rsvd2cpu,
+       .pot_clear = mv88e6xxx_g2_pot_clear,
        .reset = mv88e6352_g1_reset,
        .vtu_getnext = mv88e6352_g1_vtu_getnext,
        .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,
@@ -3081,7 +3127,8 @@ static const struct mv88e6xxx_ops mv88e6351_ops = {
        .set_cpu_port = mv88e6095_g1_set_cpu_port,
        .set_egress_port = mv88e6095_g1_set_egress_port,
        .watchdog_ops = &mv88e6097_watchdog_ops,
-       .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu,
+       .mgmt_rsvd2cpu = mv88e6352_g2_mgmt_rsvd2cpu,
+       .pot_clear = mv88e6xxx_g2_pot_clear,
        .reset = mv88e6352_g1_reset,
        .vtu_getnext = mv88e6352_g1_vtu_getnext,
        .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,
@@ -3095,6 +3142,8 @@ static const struct mv88e6xxx_ops mv88e6352_ops = {
        .set_switch_mac = mv88e6xxx_g2_set_switch_mac,
        .phy_read = mv88e6xxx_g2_smi_phy_read,
        .phy_write = mv88e6xxx_g2_smi_phy_write,
+       .phy_energy_detect_read = mv88e6352_phy_energy_detect_read,
+       .phy_energy_detect_write = mv88e6352_phy_energy_detect_write,
        .port_set_link = mv88e6xxx_port_set_link,
        .port_set_duplex = mv88e6xxx_port_set_duplex,
        .port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay,
@@ -3115,7 +3164,8 @@ static const struct mv88e6xxx_ops mv88e6352_ops = {
        .set_cpu_port = mv88e6095_g1_set_cpu_port,
        .set_egress_port = mv88e6095_g1_set_egress_port,
        .watchdog_ops = &mv88e6097_watchdog_ops,
-       .mgmt_rsvd2cpu = mv88e6095_g2_mgmt_rsvd2cpu,
+       .mgmt_rsvd2cpu = mv88e6352_g2_mgmt_rsvd2cpu,
+       .pot_clear = mv88e6xxx_g2_pot_clear,
        .reset = mv88e6352_g1_reset,
        .vtu_getnext = mv88e6352_g1_vtu_getnext,
        .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,
@@ -3130,6 +3180,8 @@ static const struct mv88e6xxx_ops mv88e6390_ops = {
        .set_switch_mac = mv88e6xxx_g2_set_switch_mac,
        .phy_read = mv88e6xxx_g2_smi_phy_read,
        .phy_write = mv88e6xxx_g2_smi_phy_write,
+       .phy_energy_detect_read = mv88e6390_phy_energy_detect_read,
+       .phy_energy_detect_write = mv88e6390_phy_energy_detect_write,
        .port_set_link = mv88e6xxx_port_set_link,
        .port_set_duplex = mv88e6xxx_port_set_duplex,
        .port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay,
@@ -3153,6 +3205,7 @@ static const struct mv88e6xxx_ops mv88e6390_ops = {
        .set_egress_port = mv88e6390_g1_set_egress_port,
        .watchdog_ops = &mv88e6390_watchdog_ops,
        .mgmt_rsvd2cpu = mv88e6390_g1_mgmt_rsvd2cpu,
+       .pot_clear = mv88e6xxx_g2_pot_clear,
        .reset = mv88e6352_g1_reset,
        .vtu_getnext = mv88e6390_g1_vtu_getnext,
        .vtu_loadpurge = mv88e6390_g1_vtu_loadpurge,
@@ -3167,6 +3220,8 @@ static const struct mv88e6xxx_ops mv88e6390x_ops = {
        .set_switch_mac = mv88e6xxx_g2_set_switch_mac,
        .phy_read = mv88e6xxx_g2_smi_phy_read,
        .phy_write = mv88e6xxx_g2_smi_phy_write,
+       .phy_energy_detect_read = mv88e6390_phy_energy_detect_read,
+       .phy_energy_detect_write = mv88e6390_phy_energy_detect_write,
        .port_set_link = mv88e6xxx_port_set_link,
        .port_set_duplex = mv88e6xxx_port_set_duplex,
        .port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay,
@@ -3190,6 +3245,7 @@ static const struct mv88e6xxx_ops mv88e6390x_ops = {
        .set_egress_port = mv88e6390_g1_set_egress_port,
        .watchdog_ops = &mv88e6390_watchdog_ops,
        .mgmt_rsvd2cpu = mv88e6390_g1_mgmt_rsvd2cpu,
+       .pot_clear = mv88e6xxx_g2_pot_clear,
        .reset = mv88e6352_g1_reset,
        .vtu_getnext = mv88e6390_g1_vtu_getnext,
        .vtu_loadpurge = mv88e6390_g1_vtu_loadpurge,
@@ -3206,12 +3262,14 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
                .max_vid = 4095,
                .port_base_addr = 0x10,
                .global1_addr = 0x1b,
+               .global2_addr = 0x1c,
                .age_time_coeff = 15000,
                .g1_irqs = 8,
+               .g2_irqs = 10,
                .atu_move_port_mask = 0xf,
                .pvt = true,
+               .multi_chip = true,
                .tag_protocol = DSA_TAG_PROTO_DSA,
-               .flags = MV88E6XXX_FLAGS_FAMILY_6097,
                .ops = &mv88e6085_ops,
        },
 
@@ -3224,11 +3282,12 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
                .max_vid = 4095,
                .port_base_addr = 0x10,
                .global1_addr = 0x1b,
+               .global2_addr = 0x1c,
                .age_time_coeff = 15000,
                .g1_irqs = 8,
                .atu_move_port_mask = 0xf,
+               .multi_chip = true,
                .tag_protocol = DSA_TAG_PROTO_DSA,
-               .flags = MV88E6XXX_FLAGS_FAMILY_6095,
                .ops = &mv88e6095_ops,
        },
 
@@ -3241,12 +3300,14 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
                .max_vid = 4095,
                .port_base_addr = 0x10,
                .global1_addr = 0x1b,
+               .global2_addr = 0x1c,
                .age_time_coeff = 15000,
                .g1_irqs = 8,
+               .g2_irqs = 10,
                .atu_move_port_mask = 0xf,
                .pvt = true,
+               .multi_chip = true,
                .tag_protocol = DSA_TAG_PROTO_EDSA,
-               .flags = MV88E6XXX_FLAGS_FAMILY_6097,
                .ops = &mv88e6097_ops,
        },
 
@@ -3259,12 +3320,14 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
                .max_vid = 4095,
                .port_base_addr = 0x10,
                .global1_addr = 0x1b,
+               .global2_addr = 0x1c,
                .age_time_coeff = 15000,
                .g1_irqs = 9,
+               .g2_irqs = 10,
                .atu_move_port_mask = 0xf,
                .pvt = true,
+               .multi_chip = true,
                .tag_protocol = DSA_TAG_PROTO_EDSA,
-               .flags = MV88E6XXX_FLAGS_FAMILY_6165,
                .ops = &mv88e6123_ops,
        },
 
@@ -3277,11 +3340,12 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
                .max_vid = 4095,
                .port_base_addr = 0x10,
                .global1_addr = 0x1b,
+               .global2_addr = 0x1c,
                .age_time_coeff = 15000,
                .g1_irqs = 9,
                .atu_move_port_mask = 0xf,
+               .multi_chip = true,
                .tag_protocol = DSA_TAG_PROTO_DSA,
-               .flags = MV88E6XXX_FLAGS_FAMILY_6185,
                .ops = &mv88e6131_ops,
        },
 
@@ -3294,11 +3358,13 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
                .max_vid = 4095,
                .port_base_addr = 0x10,
                .global1_addr = 0x1b,
+               .global2_addr = 0x1c,
                .age_time_coeff = 3750,
                .atu_move_port_mask = 0x1f,
+               .g2_irqs = 10,
                .pvt = true,
+               .multi_chip = true,
                .tag_protocol = DSA_TAG_PROTO_EDSA,
-               .flags = MV88E6XXX_FLAGS_FAMILY_6341,
                .ops = &mv88e6141_ops,
        },
 
@@ -3311,12 +3377,14 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
                .max_vid = 4095,
                .port_base_addr = 0x10,
                .global1_addr = 0x1b,
+               .global2_addr = 0x1c,
                .age_time_coeff = 15000,
                .g1_irqs = 9,
+               .g2_irqs = 10,
                .atu_move_port_mask = 0xf,
                .pvt = true,
+               .multi_chip = true,
                .tag_protocol = DSA_TAG_PROTO_EDSA,
-               .flags = MV88E6XXX_FLAGS_FAMILY_6165,
                .ops = &mv88e6161_ops,
        },
 
@@ -3329,12 +3397,14 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
                .max_vid = 4095,
                .port_base_addr = 0x10,
                .global1_addr = 0x1b,
+               .global2_addr = 0x1c,
                .age_time_coeff = 15000,
                .g1_irqs = 9,
+               .g2_irqs = 10,
                .atu_move_port_mask = 0xf,
                .pvt = true,
+               .multi_chip = true,
                .tag_protocol = DSA_TAG_PROTO_DSA,
-               .flags = MV88E6XXX_FLAGS_FAMILY_6165,
                .ops = &mv88e6165_ops,
        },
 
@@ -3347,12 +3417,14 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
                .max_vid = 4095,
                .port_base_addr = 0x10,
                .global1_addr = 0x1b,
+               .global2_addr = 0x1c,
                .age_time_coeff = 15000,
                .g1_irqs = 9,
+               .g2_irqs = 10,
                .atu_move_port_mask = 0xf,
                .pvt = true,
+               .multi_chip = true,
                .tag_protocol = DSA_TAG_PROTO_EDSA,
-               .flags = MV88E6XXX_FLAGS_FAMILY_6351,
                .ops = &mv88e6171_ops,
        },
 
@@ -3365,12 +3437,14 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
                .max_vid = 4095,
                .port_base_addr = 0x10,
                .global1_addr = 0x1b,
+               .global2_addr = 0x1c,
                .age_time_coeff = 15000,
                .g1_irqs = 9,
+               .g2_irqs = 10,
                .atu_move_port_mask = 0xf,
                .pvt = true,
+               .multi_chip = true,
                .tag_protocol = DSA_TAG_PROTO_EDSA,
-               .flags = MV88E6XXX_FLAGS_FAMILY_6352,
                .ops = &mv88e6172_ops,
        },
 
@@ -3383,12 +3457,14 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
                .max_vid = 4095,
                .port_base_addr = 0x10,
                .global1_addr = 0x1b,
+               .global2_addr = 0x1c,
                .age_time_coeff = 15000,
                .g1_irqs = 9,
+               .g2_irqs = 10,
                .atu_move_port_mask = 0xf,
                .pvt = true,
+               .multi_chip = true,
                .tag_protocol = DSA_TAG_PROTO_EDSA,
-               .flags = MV88E6XXX_FLAGS_FAMILY_6351,
                .ops = &mv88e6175_ops,
        },
 
@@ -3401,12 +3477,14 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
                .max_vid = 4095,
                .port_base_addr = 0x10,
                .global1_addr = 0x1b,
+               .global2_addr = 0x1c,
                .age_time_coeff = 15000,
                .g1_irqs = 9,
+               .g2_irqs = 10,
                .atu_move_port_mask = 0xf,
                .pvt = true,
+               .multi_chip = true,
                .tag_protocol = DSA_TAG_PROTO_EDSA,
-               .flags = MV88E6XXX_FLAGS_FAMILY_6352,
                .ops = &mv88e6176_ops,
        },
 
@@ -3419,11 +3497,12 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
                .max_vid = 4095,
                .port_base_addr = 0x10,
                .global1_addr = 0x1b,
+               .global2_addr = 0x1c,
                .age_time_coeff = 15000,
                .g1_irqs = 8,
                .atu_move_port_mask = 0xf,
+               .multi_chip = true,
                .tag_protocol = DSA_TAG_PROTO_EDSA,
-               .flags = MV88E6XXX_FLAGS_FAMILY_6185,
                .ops = &mv88e6185_ops,
        },
 
@@ -3436,12 +3515,14 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
                .max_vid = 8191,
                .port_base_addr = 0x0,
                .global1_addr = 0x1b,
+               .global2_addr = 0x1c,
                .tag_protocol = DSA_TAG_PROTO_DSA,
                .age_time_coeff = 3750,
                .g1_irqs = 9,
+               .g2_irqs = 14,
                .pvt = true,
+               .multi_chip = true,
                .atu_move_port_mask = 0x1f,
-               .flags = MV88E6XXX_FLAGS_FAMILY_6390,
                .ops = &mv88e6190_ops,
        },
 
@@ -3454,12 +3535,14 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
                .max_vid = 8191,
                .port_base_addr = 0x0,
                .global1_addr = 0x1b,
+               .global2_addr = 0x1c,
                .age_time_coeff = 3750,
                .g1_irqs = 9,
+               .g2_irqs = 14,
                .atu_move_port_mask = 0x1f,
                .pvt = true,
+               .multi_chip = true,
                .tag_protocol = DSA_TAG_PROTO_DSA,
-               .flags = MV88E6XXX_FLAGS_FAMILY_6390,
                .ops = &mv88e6190x_ops,
        },
 
@@ -3472,12 +3555,14 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
                .max_vid = 8191,
                .port_base_addr = 0x0,
                .global1_addr = 0x1b,
+               .global2_addr = 0x1c,
                .age_time_coeff = 3750,
                .g1_irqs = 9,
+               .g2_irqs = 14,
                .atu_move_port_mask = 0x1f,
                .pvt = true,
+               .multi_chip = true,
                .tag_protocol = DSA_TAG_PROTO_DSA,
-               .flags = MV88E6XXX_FLAGS_FAMILY_6390,
                .ops = &mv88e6191_ops,
        },
 
@@ -3490,12 +3575,14 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
                .max_vid = 4095,
                .port_base_addr = 0x10,
                .global1_addr = 0x1b,
+               .global2_addr = 0x1c,
                .age_time_coeff = 15000,
                .g1_irqs = 9,
+               .g2_irqs = 10,
                .atu_move_port_mask = 0xf,
                .pvt = true,
+               .multi_chip = true,
                .tag_protocol = DSA_TAG_PROTO_EDSA,
-               .flags = MV88E6XXX_FLAGS_FAMILY_6352,
                .ops = &mv88e6240_ops,
        },
 
@@ -3508,12 +3595,14 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
                .max_vid = 8191,
                .port_base_addr = 0x0,
                .global1_addr = 0x1b,
+               .global2_addr = 0x1c,
                .age_time_coeff = 3750,
                .g1_irqs = 9,
+               .g2_irqs = 14,
                .atu_move_port_mask = 0x1f,
                .pvt = true,
+               .multi_chip = true,
                .tag_protocol = DSA_TAG_PROTO_DSA,
-               .flags = MV88E6XXX_FLAGS_FAMILY_6390,
                .ops = &mv88e6290_ops,
        },
 
@@ -3526,12 +3615,13 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
                .max_vid = 4095,
                .port_base_addr = 0x10,
                .global1_addr = 0x1b,
+               .global2_addr = 0x1c,
                .age_time_coeff = 15000,
                .g1_irqs = 8,
                .atu_move_port_mask = 0xf,
                .pvt = true,
+               .multi_chip = true,
                .tag_protocol = DSA_TAG_PROTO_EDSA,
-               .flags = MV88E6XXX_FLAGS_FAMILY_6320,
                .ops = &mv88e6320_ops,
        },
 
@@ -3544,11 +3634,12 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
                .max_vid = 4095,
                .port_base_addr = 0x10,
                .global1_addr = 0x1b,
+               .global2_addr = 0x1c,
                .age_time_coeff = 15000,
                .g1_irqs = 8,
                .atu_move_port_mask = 0xf,
+               .multi_chip = true,
                .tag_protocol = DSA_TAG_PROTO_EDSA,
-               .flags = MV88E6XXX_FLAGS_FAMILY_6320,
                .ops = &mv88e6321_ops,
        },
 
@@ -3561,11 +3652,13 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
                .max_vid = 4095,
                .port_base_addr = 0x10,
                .global1_addr = 0x1b,
+               .global2_addr = 0x1c,
                .age_time_coeff = 3750,
                .atu_move_port_mask = 0x1f,
+               .g2_irqs = 10,
                .pvt = true,
+               .multi_chip = true,
                .tag_protocol = DSA_TAG_PROTO_EDSA,
-               .flags = MV88E6XXX_FLAGS_FAMILY_6341,
                .ops = &mv88e6341_ops,
        },
 
@@ -3578,12 +3671,14 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
                .max_vid = 4095,
                .port_base_addr = 0x10,
                .global1_addr = 0x1b,
+               .global2_addr = 0x1c,
                .age_time_coeff = 15000,
                .g1_irqs = 9,
+               .g2_irqs = 10,
                .atu_move_port_mask = 0xf,
                .pvt = true,
+               .multi_chip = true,
                .tag_protocol = DSA_TAG_PROTO_EDSA,
-               .flags = MV88E6XXX_FLAGS_FAMILY_6351,
                .ops = &mv88e6350_ops,
        },
 
@@ -3596,12 +3691,14 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
                .max_vid = 4095,
                .port_base_addr = 0x10,
                .global1_addr = 0x1b,
+               .global2_addr = 0x1c,
                .age_time_coeff = 15000,
                .g1_irqs = 9,
+               .g2_irqs = 10,
                .atu_move_port_mask = 0xf,
                .pvt = true,
+               .multi_chip = true,
                .tag_protocol = DSA_TAG_PROTO_EDSA,
-               .flags = MV88E6XXX_FLAGS_FAMILY_6351,
                .ops = &mv88e6351_ops,
        },
 
@@ -3614,12 +3711,14 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
                .max_vid = 4095,
                .port_base_addr = 0x10,
                .global1_addr = 0x1b,
+               .global2_addr = 0x1c,
                .age_time_coeff = 15000,
                .g1_irqs = 9,
+               .g2_irqs = 10,
                .atu_move_port_mask = 0xf,
                .pvt = true,
+               .multi_chip = true,
                .tag_protocol = DSA_TAG_PROTO_EDSA,
-               .flags = MV88E6XXX_FLAGS_FAMILY_6352,
                .ops = &mv88e6352_ops,
        },
        [MV88E6390] = {
@@ -3631,12 +3730,14 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
                .max_vid = 8191,
                .port_base_addr = 0x0,
                .global1_addr = 0x1b,
+               .global2_addr = 0x1c,
                .age_time_coeff = 3750,
                .g1_irqs = 9,
+               .g2_irqs = 14,
                .atu_move_port_mask = 0x1f,
                .pvt = true,
+               .multi_chip = true,
                .tag_protocol = DSA_TAG_PROTO_DSA,
-               .flags = MV88E6XXX_FLAGS_FAMILY_6390,
                .ops = &mv88e6390_ops,
        },
        [MV88E6390X] = {
@@ -3648,12 +3749,14 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
                .max_vid = 8191,
                .port_base_addr = 0x0,
                .global1_addr = 0x1b,
+               .global2_addr = 0x1c,
                .age_time_coeff = 3750,
                .g1_irqs = 9,
+               .g2_irqs = 14,
                .atu_move_port_mask = 0x1f,
                .pvt = true,
+               .multi_chip = true,
                .tag_protocol = DSA_TAG_PROTO_DSA,
-               .flags = MV88E6XXX_FLAGS_FAMILY_6390,
                .ops = &mv88e6390x_ops,
        },
 };
@@ -3723,7 +3826,7 @@ static int mv88e6xxx_smi_init(struct mv88e6xxx_chip *chip,
 {
        if (sw_addr == 0)
                chip->smi_ops = &mv88e6xxx_smi_single_chip_ops;
-       else if (mv88e6xxx_has(chip, MV88E6XXX_FLAGS_MULTI_CHIP))
+       else if (chip->info->multi_chip)
                chip->smi_ops = &mv88e6xxx_smi_multi_chip_ops;
        else
                return -EINVAL;
@@ -3971,7 +4074,7 @@ static int mv88e6xxx_probe(struct mdio_device *mdiodev)
                if (err)
                        goto out;
 
-               if (mv88e6xxx_has(chip, MV88E6XXX_FLAG_G2_INT)) {
+               if (chip->info->g2_irqs > 0) {
                        err = mv88e6xxx_g2_irq_setup(chip);
                        if (err)
                                goto out_g1_irq;
@@ -3991,7 +4094,7 @@ static int mv88e6xxx_probe(struct mdio_device *mdiodev)
 out_mdio:
        mv88e6xxx_mdios_unregister(chip);
 out_g2_irq:
-       if (mv88e6xxx_has(chip, MV88E6XXX_FLAG_G2_INT) && chip->irq > 0)
+       if (chip->info->g2_irqs > 0 && chip->irq > 0)
                mv88e6xxx_g2_irq_free(chip);
 out_g1_irq:
        if (chip->irq > 0) {
@@ -4013,7 +4116,7 @@ static void mv88e6xxx_remove(struct mdio_device *mdiodev)
        mv88e6xxx_mdios_unregister(chip);
 
        if (chip->irq > 0) {
-               if (mv88e6xxx_has(chip, MV88E6XXX_FLAG_G2_INT))
+               if (chip->info->g2_irqs > 0)
                        mv88e6xxx_g2_irq_free(chip);
                mv88e6xxx_g1_irq_free(chip);
        }