return spi_flash_read_write(spi, cmd, cmd_len, data, NULL, data_len);
}
-int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset,
- size_t len, const void *buf)
+int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
+ size_t cmd_len, const void *buf, size_t buf_len)
{
- unsigned long byte_addr, page_size;
- size_t chunk_len, actual;
+ struct spi_slave *spi = flash->spi;
+ unsigned long timeout = SPI_FLASH_PROG_TIMEOUT;
int ret;
- u8 cmd[4];
- page_size = flash->page_size;
+ if (buf == NULL)
+ timeout = SPI_FLASH_PAGE_ERASE_TIMEOUT;
ret = spi_claim_bus(flash->spi);
if (ret) {
return ret;
}
+ ret = spi_flash_cmd_write_enable(flash);
+ if (ret < 0) {
+ debug("SF: enabling write failed\n");
+ return ret;
+ }
+
+ ret = spi_flash_cmd_write(spi, cmd, cmd_len, buf, buf_len);
+ if (ret < 0) {
+ debug("SF: write cmd failed\n");
+ return ret;
+ }
+
+ ret = spi_flash_cmd_wait_ready(flash, timeout);
+ if (ret < 0) {
+ debug("SF: write %s timed out\n",
+ timeout == SPI_FLASH_PROG_TIMEOUT ?
+ "program" : "page erase");
+ return ret;
+ }
+
+ spi_release_bus(spi);
+
+ return ret;
+}
+
+int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset,
+ size_t len, const void *buf)
+{
+ unsigned long byte_addr, page_size;
+ size_t chunk_len, actual;
+ u8 cmd[4];
+ int ret = -1;
+
+ page_size = flash->page_size;
+
cmd[0] = CMD_PAGE_PROGRAM;
for (actual = 0; actual < len; actual += chunk_len) {
#ifdef CONFIG_SPI_FLASH_BAR
debug("PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
- ret = spi_flash_cmd_write_enable(flash);
- if (ret < 0) {
- debug("SF: enabling write failed\n");
- break;
- }
-
- ret = spi_flash_cmd_write(flash->spi, cmd, 4,
- buf + actual, chunk_len);
+ ret = spi_flash_write_common(flash, cmd, sizeof(cmd),
+ buf + actual, chunk_len);
if (ret < 0) {
debug("SF: write failed\n");
break;
}
- ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
- if (ret)
- break;
-
offset += chunk_len;
}
- spi_release_bus(flash->spi);
return ret;
}
return ret;
}
-int spi_flash_cmd_poll_bit(struct spi_flash *flash, unsigned long timeout,
- u8 cmd, u8 poll_bit)
+int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)
{
struct spi_slave *spi = flash->spi;
unsigned long timebase;
int ret;
u8 status;
+ u8 check_status = 0x0;
+ u8 poll_bit = STATUS_WIP;
+ u8 cmd = flash->poll_cmd;
+
+ if (cmd == CMD_FLAG_STATUS) {
+ poll_bit = STATUS_PEC;
+ check_status = poll_bit;
+ }
ret = spi_xfer(spi, 8, &cmd, NULL, SPI_XFER_BEGIN);
if (ret) {
- debug("SF: Failed to send command %02x: %d\n", cmd, ret);
+ debug("SF: fail to read %s status register\n",
+ cmd == CMD_READ_STATUS ? "read" : "flag");
return ret;
}
if (ret)
return -1;
- if ((status & poll_bit) == 0)
+ if ((status & poll_bit) == check_status)
break;
} while (get_timer(timebase) < timeout);
spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END);
- if ((status & poll_bit) == 0)
+ if ((status & poll_bit) == check_status)
return 0;
/* Timed out */
return -1;
}
-int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)
-{
- return spi_flash_cmd_poll_bit(flash, timeout,
- CMD_READ_STATUS, STATUS_WIP);
-}
-
int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len)
{
u32 erase_size;
- int ret;
u8 cmd[4];
+ int ret = -1;
erase_size = flash->sector_size;
if (offset % erase_size || len % erase_size) {
return -1;
}
- ret = spi_claim_bus(flash->spi);
- if (ret) {
- debug("SF: Unable to claim SPI bus\n");
- return ret;
- }
-
if (erase_size == 4096)
cmd[0] = CMD_ERASE_4K;
else
debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
cmd[2], cmd[3], offset);
- ret = spi_flash_cmd_write_enable(flash);
- if (ret)
- goto out;
-
- ret = spi_flash_cmd_write(flash->spi, cmd, sizeof(cmd), NULL, 0);
- if (ret)
- goto out;
-
- ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PAGE_ERASE_TIMEOUT);
- if (ret)
- goto out;
+ ret = spi_flash_write_common(flash, cmd, sizeof(cmd), NULL, 0);
+ if (ret < 0) {
+ debug("SF: erase failed\n");
+ break;
+ }
offset += erase_size;
len -= erase_size;
}
- out:
- spi_release_bus(flash->spi);
return ret;
}
u8 cmd;
int ret;
- ret = spi_flash_cmd_write_enable(flash);
- if (ret < 0) {
- debug("SF: enabling write failed\n");
- return ret;
- }
-
cmd = CMD_WRITE_STATUS;
- ret = spi_flash_cmd_write(flash->spi, &cmd, 1, &sr, 1);
- if (ret) {
- debug("SF: fail to write status register\n");
- return ret;
- }
-
- ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
+ ret = spi_flash_write_common(flash, &cmd, 1, &sr, 1);
if (ret < 0) {
- debug("SF: write status register timed out\n");
+ debug("SF: fail to write status register\n");
return ret;
}
}
cmd = flash->bank_write_cmd;
- ret = spi_flash_cmd_write_enable(flash);
+ ret = spi_flash_write_common(flash, &cmd, 1, &bank_sel, 1);
if (ret < 0) {
- debug("SF: enabling write failed\n");
- return ret;
- }
-
- ret = spi_flash_cmd_write(flash->spi, &cmd, 1, &bank_sel, 1);
- if (ret) {
- debug("SF: fail to write bank addr register\n");
+ debug("SF: fail to write bank register\n");
return ret;
}
flash->bank_curr = bank_sel;
- ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
- if (ret < 0) {
- debug("SF: write bank addr register timed out\n");
- return ret;
- }
-
return 0;
}
/* Set up some basic fields - caller will sort out sizes */
flash->spi = spi;
flash->name = name;
+ flash->poll_cmd = CMD_READ_STATUS;
flash->read = spi_flash_cmd_read_fast;
flash->write = spi_flash_cmd_write_multi;
projects / platform / kernel / u-boot.git / blobdiff