mtd: spi-nor-core: Get command opcode extension type from BFPT

[platform/kernel/u-boot.git] / drivers / mtd / spi / spi-nor-core.c

diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 5a65597..d9af5cb 100644 (file)
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -149,6 +149,12 @@ struct sfdp_header {
 #define BFPT_DWORD15_QER_SR2_BIT1_NO_RD                (0x4UL << 20)
 #define BFPT_DWORD15_QER_SR2_BIT1              (0x5UL << 20) /* Spansion */
 
+#define BFPT_DWORD18_CMD_EXT_MASK              GENMASK(30, 29)
+#define BFPT_DWORD18_CMD_EXT_REP               (0x0UL << 29) /* Repeat */
+#define BFPT_DWORD18_CMD_EXT_INV               (0x1UL << 29) /* Invert */
+#define BFPT_DWORD18_CMD_EXT_RES               (0x2UL << 29) /* Reserved */
+#define BFPT_DWORD18_CMD_EXT_16B               (0x3UL << 29) /* 16-bit opcode */
+
 struct sfdp_bfpt {
        u32     dwords[BFPT_DWORD_MAX];
 };
@@ -2040,6 +2046,24 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor,
                return spi_nor_post_bfpt_fixups(nor, bfpt_header, &bfpt,
                                                params);
 
+       /* 8D-8D-8D command extension. */
+       switch (bfpt.dwords[BFPT_DWORD(18)] & BFPT_DWORD18_CMD_EXT_MASK) {
+       case BFPT_DWORD18_CMD_EXT_REP:
+               nor->cmd_ext_type = SPI_NOR_EXT_REPEAT;
+               break;
+
+       case BFPT_DWORD18_CMD_EXT_INV:
+               nor->cmd_ext_type = SPI_NOR_EXT_INVERT;
+               break;
+
+       case BFPT_DWORD18_CMD_EXT_RES:
+               return -EINVAL;
+
+       case BFPT_DWORD18_CMD_EXT_16B:
+               dev_err(nor->dev, "16-bit opcodes not supported\n");
+               return -ENOTSUPP;
+       }
+
        return spi_nor_post_bfpt_fixups(nor, bfpt_header, &bfpt, params);
 }