Merge branch 'master' of git://git.denx.de/u-boot-spi

[platform/kernel/u-boot.git] / drivers / mtd / spi / sf_internal.h

diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 6b2ab7b..46a5044 100644 (file)
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -1,10 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * SPI flash internal definitions
  *
  * Copyright (C) 2008 Atmel Corporation
  * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef _SF_INTERNAL_H_
@@ -23,6 +22,7 @@ enum spi_dual_flash {
 enum spi_nor_option_flags {
        SNOR_F_SST_WR           = BIT(0),
        SNOR_F_USE_FSR          = BIT(1),
+       SNOR_F_USE_UPAGE        = BIT(3),
 };
 
 #define SPI_FLASH_3B_ADDR_LEN          3
@@ -32,6 +32,7 @@ enum spi_nor_option_flags {
 /* CFI Manufacture ID's */
 #define SPI_FLASH_CFI_MFR_SPANSION     0x01
 #define SPI_FLASH_CFI_MFR_STMICRO      0x20
+#define SPI_FLASH_CFI_MFR_MICRON       0x2C
 #define SPI_FLASH_CFI_MFR_MACRONIX     0xc2
 #define SPI_FLASH_CFI_MFR_SST          0xbf
 #define SPI_FLASH_CFI_MFR_WINBOND      0xef
@@ -48,7 +49,6 @@ enum spi_nor_option_flags {
 #define CMD_WRITE_DISABLE              0x04
 #define CMD_WRITE_ENABLE               0x06
 #define CMD_QUAD_PAGE_PROGRAM          0x32
-#define CMD_WRITE_EVCR                 0x61
 
 /* Read commands */
 #define CMD_READ_ARRAY_SLOW            0x03
@@ -62,7 +62,6 @@ enum spi_nor_option_flags {
 #define CMD_READ_STATUS1               0x35
 #define CMD_READ_CONFIG                        0x35
 #define CMD_FLAG_STATUS                        0x70
-#define CMD_READ_EVCR                  0x65
 
 /* Bank addr access commands */
 #ifdef CONFIG_SPI_FLASH_BAR
@@ -77,7 +76,6 @@ enum spi_nor_option_flags {
 #define STATUS_QEB_WINSPAN             BIT(1)
 #define STATUS_QEB_MXIC                        BIT(6)
 #define STATUS_PEC                     BIT(7)
-#define STATUS_QEB_MICRON              BIT(7)
 #define SR_BP0                         BIT(2)  /* Block protect 0 */
 #define SR_BP1                         BIT(3)  /* Block protect 1 */
 #define SR_BP2                         BIT(4)  /* Block protect 2 */
@@ -89,6 +87,19 @@ enum spi_nor_option_flags {
 
 /* SST specific */
 #ifdef CONFIG_SPI_FLASH_SST
+#define SST26_CMD_READ_BPR             0x72
+#define SST26_CMD_WRITE_BPR            0x42
+
+#define SST26_BPR_8K_NUM               4
+#define SST26_MAX_BPR_REG_LEN          (18 + 1)
+#define SST26_BOUND_REG_SIZE           ((32 + SST26_BPR_8K_NUM * 8) * SZ_1K)
+
+enum lock_ctl {
+       SST26_CTL_LOCK,
+       SST26_CTL_UNLOCK,
+       SST26_CTL_CHECK
+};
+
 # define CMD_SST_BP            0x02    /* Byte Program */
 # define CMD_SST_AAI_WP                0xAD    /* Auto Address Incr Word Program */
 
@@ -98,12 +109,6 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
                const void *buf);
 #endif
 
-#ifdef CONFIG_SPI_FLASH_SPANSION
-/* Used for Spansion S25FS-S family flash only. */
-#define CMD_SPANSION_RDAR      0x65 /* Read any device register */
-#define CMD_SPANSION_WRAR      0x71 /* Write any device register */
-#endif
-
 #define JEDEC_MFR(info)                ((info)->id[0])
 #define JEDEC_ID(info)         (((info)->id[1]) << 8 | ((info)->id[2]))
 #define JEDEC_EXT(info)                (((info)->id[3]) << 8 | ((info)->id[4]))
@@ -165,6 +170,9 @@ int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
 /* Flash erase(sectors) operation, support all possible erase commands */
 int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len);
 
+/* Get software write-protect value (BP bits) */
+int spi_flash_cmd_get_sw_write_prot(struct spi_flash *flash);
+
 /* Lock stmicro spi flash region */
 int stm_lock(struct spi_flash *flash, u32 ofs, size_t len);
 
@@ -191,7 +199,7 @@ static inline int spi_flash_cmd_write_disable(struct spi_flash *flash)
  * - SPI claim
  * - spi_flash_cmd_write_enable
  * - spi_flash_cmd_write
- * - spi_flash_cmd_wait_ready
+ * - spi_flash_wait_till_ready
  * - SPI release
  */
 int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,