global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_*

[platform/kernel/u-boot.git] / drivers / mtd / nand / raw / fsmc_nand.c

diff --git a/drivers/mtd/nand/raw/fsmc_nand.c b/drivers/mtd/nand/raw/fsmc_nand.c
index 1f4c74f..d795864 100644 (file)
--- a/drivers/mtd/nand/raw/fsmc_nand.c
+++ b/drivers/mtd/nand/raw/fsmc_nand.c
@@ -1,10 +1,10 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2010
- * Vipin Kumar, ST Microelectronics, vipin.kumar@st.com.
+ * Vipin Kumar, STMicroelectronics, vipin.kumar@st.com.
  *
  * (C) Copyright 2012
- * Amit Virdi, ST Microelectronics, amit.virdi@st.com.
+ * Amit Virdi, STMicroelectronics, amit.virdi@st.com.
  */
 
 #include <common.h>
@@ -13,6 +13,7 @@
 #include <linux/bitops.h>
 #include <linux/err.h>
 #include <linux/mtd/nand_ecc.h>
+#include <linux/mtd/rawnand.h>
 #include <linux/mtd/fsmc_nand.h>
 #include <asm/arch/hardware.h>
 
@@ -389,55 +390,6 @@ static int fsmc_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
        return 0;
 }
 
-#ifndef CONFIG_SPL_BUILD
-/*
- * fsmc_nand_switch_ecc - switch the ECC operation between different engines
- *
- * @eccstrength                - the number of bits that could be corrected
- *                       (1 - HW, 4 - SW BCH4)
- */
-int fsmc_nand_switch_ecc(uint32_t eccstrength)
-{
-       struct nand_chip *nand;
-       struct mtd_info *mtd;
-       int err;
-
-       /*
-        * This functions is only called on SPEAr600 platforms, supporting
-        * 1 bit HW ECC. The BCH8 HW ECC (FSMC_VER8) from the ST-Ericsson
-        * Nomadik SoC is currently supporting this fsmc_nand_switch_ecc()
-        * function, as it doesn't need to switch to a different ECC layout.
-        */
-       mtd = get_nand_dev_by_index(nand_curr_device);
-       nand = mtd_to_nand(mtd);
-
-       /* Setup the ecc configurations again */
-       if (eccstrength == 1) {
-               nand->ecc.mode = NAND_ECC_HW;
-               nand->ecc.bytes = 3;
-               nand->ecc.strength = 1;
-               nand->ecc.layout = &fsmc_ecc1_layout;
-               nand->ecc.calculate = fsmc_read_hwecc;
-               nand->ecc.correct = nand_correct_data;
-       } else if (eccstrength == 4) {
-               /*
-                * .calculate .correct and .bytes will be set in
-                * nand_scan_tail()
-                */
-               nand->ecc.mode = NAND_ECC_SOFT_BCH;
-               nand->ecc.strength = 4;
-               nand->ecc.layout = NULL;
-       } else {
-               printf("Error: ECC strength %d not supported!\n", eccstrength);
-       }
-
-       /* Update NAND handling after ECC mode switch */
-       err = nand_scan_tail(mtd);
-
-       return err;
-}
-#endif /* CONFIG_SPL_BUILD */
-
 int fsmc_nand_init(struct nand_chip *nand)
 {
        static int chip_nr;
@@ -475,7 +427,7 @@ int fsmc_nand_init(struct nand_chip *nand)
        nand->ecc.hwctl = fsmc_enable_hwecc;
        nand->cmd_ctrl = fsmc_nand_hwcontrol;
        nand->IO_ADDR_R = nand->IO_ADDR_W =
-               (void  __iomem *)CONFIG_SYS_NAND_BASE;
+               (void  __iomem *)CFG_SYS_NAND_BASE;
        nand->badblockbits = 7;
 
        mtd = nand_to_mtd(nand);