return __raw_readl(addr);
}
-static u64 flash_read64(void *addr)
+static u64 __flash_read64(void *addr)
{
/* No architectures currently implement __raw_readq() */
return *(volatile u64 *)addr;
}
+u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64")));
+
/*-----------------------------------------------------------------------
*/
#if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
}
/*-----------------------------------------------------------------------
+ * read a word at a port width address, assume 16bit bus
+ */
+static inline ushort flash_read_word (flash_info_t * info, uint offset)
+{
+ ushort *addr, retval;
+
+ addr = flash_map (info, 0, offset);
+ retval = flash_read16 (addr);
+ flash_unmap (info, 0, offset, addr);
+ return retval;
+}
+
+
+/*-----------------------------------------------------------------------
* read a long word by picking the least significant byte of each maximum
* port size word. Swap for ppc format.
*/
retval = ((flash_read16(addr) & cword.w) == cword.w);
break;
case FLASH_CFI_32BIT:
- retval = ((flash_read16(addr) & cword.l) == cword.l);
+ retval = ((flash_read32(addr) & cword.l) == cword.l);
break;
case FLASH_CFI_64BIT:
retval = ((flash_read64(addr) & cword.ll) == cword.ll);
}
if (!flag) {
unmap_physmem(dstaddr, info->portwidth);
- return 2;
+ return ERR_NOT_ERASED;
}
/* Disable interrupts which might cause a timeout here */
int retcode;
void *src = cp;
void *dst = map_physmem(dest, len, MAP_NOCACHE);
+ void *dst2 = dst;
+ int flag = 0;
+ uint offset = 0;
+ unsigned int shift;
+
+ switch (info->portwidth) {
+ case FLASH_CFI_8BIT:
+ shift = 0;
+ break;
+ case FLASH_CFI_16BIT:
+ shift = 1;
+ break;
+ case FLASH_CFI_32BIT:
+ shift = 2;
+ break;
+ case FLASH_CFI_64BIT:
+ shift = 3;
+ break;
+ default:
+ retcode = ERR_INVAL;
+ goto out_unmap;
+ }
+
+ cnt = len >> shift;
+ while ((cnt-- > 0) && (flag == 0)) {
+ switch (info->portwidth) {
+ case FLASH_CFI_8BIT:
+ flag = ((flash_read8(dst2) & flash_read8(src)) ==
+ flash_read8(src));
+ src += 1, dst2 += 1;
+ break;
+ case FLASH_CFI_16BIT:
+ flag = ((flash_read16(dst2) & flash_read16(src)) ==
+ flash_read16(src));
+ src += 2, dst2 += 2;
+ break;
+ case FLASH_CFI_32BIT:
+ flag = ((flash_read32(dst2) & flash_read32(src)) ==
+ flash_read32(src));
+ src += 4, dst2 += 4;
+ break;
+ case FLASH_CFI_64BIT:
+ flag = ((flash_read64(dst2) & flash_read64(src)) ==
+ flash_read64(src));
+ src += 8, dst2 += 8;
+ break;
+ }
+ }
+ if (!flag) {
+ retcode = ERR_NOT_ERASED;
+ goto out_unmap;
+ }
+
+ src = cp;
sector = find_sector (info, dest);
switch (info->vendor) {
if (retcode == ERR_OK) {
/* reduce the number of loops by the width of
* the port */
- switch (info->portwidth) {
- case FLASH_CFI_8BIT:
- cnt = len;
- break;
- case FLASH_CFI_16BIT:
- cnt = len >> 1;
- break;
- case FLASH_CFI_32BIT:
- cnt = len >> 2;
- break;
- case FLASH_CFI_64BIT:
- cnt = len >> 3;
- break;
- default:
- retcode = ERR_INVAL;
- goto out_unmap;
- }
+ cnt = len >> shift;
flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
while (cnt-- > 0) {
switch (info->portwidth) {
case CFI_CMDSET_AMD_STANDARD:
case CFI_CMDSET_AMD_EXTENDED:
flash_unlock_seq(info,0);
- flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_TO_BUFFER);
+
+#ifdef CONFIG_FLASH_SPANSION_S29WS_N
+ offset = ((unsigned long)dst - info->start[sector]) >> shift;
+#endif
+ flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
+ cnt = len >> shift;
+ flash_write_cmd(info, sector, offset, (uchar)cnt - 1);
switch (info->portwidth) {
case FLASH_CFI_8BIT:
- cnt = len;
- flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
while (cnt-- > 0) {
flash_write8(flash_read8(src), dst);
src += 1, dst += 1;
}
break;
case FLASH_CFI_16BIT:
- cnt = len >> 1;
- flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
while (cnt-- > 0) {
flash_write16(flash_read16(src), dst);
src += 2, dst += 2;
}
break;
case FLASH_CFI_32BIT:
- cnt = len >> 2;
- flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
while (cnt-- > 0) {
flash_write32(flash_read32(src), dst);
src += 4, dst += 4;
}
break;
case FLASH_CFI_64BIT:
- cnt = len >> 3;
- flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
while (cnt-- > 0) {
flash_write64(flash_read64(src), dst);
src += 8, dst += 8;
}
/*-----------------------------------------------------------------------
+ * This is used in a few places in write_buf() to show programming
+ * progress. Making it a function is nasty because it needs to do side
+ * effect updates to digit and dots. Repeated code is nasty too, so
+ * we define it once here.
+ */
+#ifdef CONFIG_FLASH_SHOW_PROGRESS
+#define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
+ dots -= dots_sub; \
+ if ((scale > 0) && (dots <= 0)) { \
+ if ((digit % 5) == 0) \
+ printf ("%d", digit / 5); \
+ else \
+ putc ('.'); \
+ digit--; \
+ dots += scale; \
+ }
+#else
+#define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
+#endif
+
+/*-----------------------------------------------------------------------
* Copy memory to flash, returns:
* 0 - OK
* 1 - write timeout
int aln;
cfiword_t cword;
int i, rc;
-
#ifdef CFG_FLASH_USE_BUFFER_WRITE
int buffered_size;
#endif
+#ifdef CONFIG_FLASH_SHOW_PROGRESS
+ int digit = CONFIG_FLASH_SHOW_PROGRESS;
+ int scale = 0;
+ int dots = 0;
+
+ /*
+ * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
+ */
+ if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
+ scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
+ CONFIG_FLASH_SHOW_PROGRESS);
+ }
+#endif
+
/* get lower aligned address */
wp = (addr & ~(info->portwidth - 1));
return rc;
wp += i;
+ FLASH_SHOW_PROGRESS(scale, dots, digit, i);
}
/* handle the aligned part */
wp += i;
src += i;
cnt -= i;
+ FLASH_SHOW_PROGRESS(scale, dots, digit, i);
}
#else
while (cnt >= info->portwidth) {
return rc;
wp += info->portwidth;
cnt -= info->portwidth;
+ FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
}
#endif /* CFG_FLASH_USE_BUFFER_WRITE */
+
if (cnt == 0) {
return (0);
}
#endif /* CFG_FLASH_PROTECTION */
+/*-----------------------------------------------------------------------
+ * Reverse the order of the erase regions in the CFI QRY structure.
+ * This is needed for chips that are either a) correctly detected as
+ * top-boot, or b) buggy.
+ */
+static void cfi_reverse_geometry(struct cfi_qry *qry)
+{
+ unsigned int i, j;
+ u32 tmp;
+
+ for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
+ tmp = qry->erase_region_info[i];
+ qry->erase_region_info[i] = qry->erase_region_info[j];
+ qry->erase_region_info[j] = tmp;
+ }
+}
/*-----------------------------------------------------------------------
* read jedec ids from device and set corresponding fields in info struct
*
* Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
*
-*/
-static void flash_read_jedec_ids (flash_info_t * info)
+ */
+static void cmdset_intel_read_jedec_ids(flash_info_t *info)
{
- info->manufacturer_id = 0;
- info->device_id = 0;
- info->device_id2 = 0;
+ flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
+ flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
+ udelay(1000); /* some flash are slow to respond */
+ info->manufacturer_id = flash_read_uchar (info,
+ FLASH_OFFSET_MANUFACTURER_ID);
+ info->device_id = flash_read_uchar (info,
+ FLASH_OFFSET_DEVICE_ID);
+ flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
+}
- switch (info->vendor) {
- case CFI_CMDSET_INTEL_STANDARD:
- case CFI_CMDSET_INTEL_EXTENDED:
- flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
- flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
- udelay(1000); /* some flash are slow to respond */
- info->manufacturer_id = flash_read_uchar (info,
- FLASH_OFFSET_MANUFACTURER_ID);
- info->device_id = flash_read_uchar (info,
- FLASH_OFFSET_DEVICE_ID);
- flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
- break;
- case CFI_CMDSET_AMD_STANDARD:
- case CFI_CMDSET_AMD_EXTENDED:
- flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
- flash_unlock_seq(info, 0);
- flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
- udelay(1000); /* some flash are slow to respond */
- info->manufacturer_id = flash_read_uchar (info,
- FLASH_OFFSET_MANUFACTURER_ID);
+static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
+{
+ info->cmd_reset = FLASH_CMD_RESET;
+
+ cmdset_intel_read_jedec_ids(info);
+ flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
+
+#ifdef CFG_FLASH_PROTECTION
+ /* read legacy lock/unlock bit from intel flash */
+ if (info->ext_addr) {
+ info->legacy_unlock = flash_read_uchar (info,
+ info->ext_addr + 5) & 0x08;
+ }
+#endif
+
+ return 0;
+}
+
+static void cmdset_amd_read_jedec_ids(flash_info_t *info)
+{
+ flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
+ flash_unlock_seq(info, 0);
+ flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
+ udelay(1000); /* some flash are slow to respond */
+
+ info->manufacturer_id = flash_read_uchar (info,
+ FLASH_OFFSET_MANUFACTURER_ID);
+
+ switch (info->chipwidth){
+ case FLASH_CFI_8BIT:
info->device_id = flash_read_uchar (info,
FLASH_OFFSET_DEVICE_ID);
if (info->device_id == 0x7E) {
info->device_id2 |= flash_read_uchar (info,
FLASH_OFFSET_DEVICE_ID3);
}
- flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
+ break;
+ case FLASH_CFI_16BIT:
+ info->device_id = flash_read_word (info,
+ FLASH_OFFSET_DEVICE_ID);
break;
default:
break;
}
+ flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
+}
+
+static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
+{
+ info->cmd_reset = AMD_CMD_RESET;
+
+ cmdset_amd_read_jedec_ids(info);
+ flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
+
+ return 0;
}
#ifdef CONFIG_FLASH_CFI_LEGACY
+static void flash_read_jedec_ids (flash_info_t * info)
+{
+ info->manufacturer_id = 0;
+ info->device_id = 0;
+ info->device_id2 = 0;
+
+ switch (info->vendor) {
+ case CFI_CMDSET_INTEL_STANDARD:
+ case CFI_CMDSET_INTEL_EXTENDED:
+ cmdset_intel_read_jedec_ids(info);
+ break;
+ case CFI_CMDSET_AMD_STANDARD:
+ case CFI_CMDSET_AMD_EXTENDED:
+ cmdset_amd_read_jedec_ids(info);
+ break;
+ default:
+ break;
+ }
+}
+
/*-----------------------------------------------------------------------
* Call board code to request info about non-CFI flash.
* board_flash_get_legacy needs to fill in at least:
{
int cfi_offset;
- flash_write_cmd (info, 0, 0, info->cmd_reset);
+ /* We do not yet know what kind of commandset to use, so we issue
+ the reset command in both Intel and AMD variants, in the hope
+ that AMD flash roms ignore the Intel command. */
+ flash_write_cmd (info, 0, 0, AMD_CMD_RESET);
+ flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
+
for (cfi_offset=0;
cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
cfi_offset++) {
}
/*
+ * Manufacturer-specific quirks. Add workarounds for geometry
+ * reversal, etc. here.
+ */
+static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
+{
+ /* check if flash geometry needs reversal */
+ if (qry->num_erase_regions > 1) {
+ /* reverse geometry if top boot part */
+ if (info->cfi_version < 0x3131) {
+ /* CFI < 1.1, try to guess from device id */
+ if ((info->device_id & 0x80) != 0)
+ cfi_reverse_geometry(qry);
+ } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
+ /* CFI >= 1.1, deduct from top/bottom flag */
+ /* note: ext_addr is valid since cfi_version > 0 */
+ cfi_reverse_geometry(qry);
+ }
+ }
+}
+
+static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
+{
+ int reverse_geometry = 0;
+
+ /* Check the "top boot" bit in the PRI */
+ if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
+ reverse_geometry = 1;
+
+ /* AT49BV6416(T) list the erase regions in the wrong order.
+ * However, the device ID is identical with the non-broken
+ * AT49BV642D since u-boot only reads the low byte (they
+ * differ in the high byte.) So leave out this fixup for now.
+ */
+#if 0
+ if (info->device_id == 0xd6 || info->device_id == 0xd2)
+ reverse_geometry = !reverse_geometry;
+#endif
+
+ if (reverse_geometry)
+ cfi_reverse_geometry(qry);
+}
+
+/*
* The following code cannot be run from FLASH!
*
*/
uchar num_erase_regions;
int erase_region_size;
int erase_region_count;
- int geometry_reversed = 0;
struct cfi_qry qry;
+ memset(&qry, 0, sizeof(qry));
+
info->ext_addr = 0;
info->cfi_version = 0;
#ifdef CFG_FLASH_PROTECTION
info->ext_addr = le16_to_cpu(qry.p_adr);
num_erase_regions = qry.num_erase_regions;
- flash_read_jedec_ids (info);
- flash_write_cmd (info, 0, info->cfi_offset, FLASH_CMD_CFI);
-
if (info->ext_addr) {
info->cfi_version = (ushort) flash_read_uchar (info,
info->ext_addr + 3) << 8;
info->cfi_version |= (ushort) flash_read_uchar (info,
info->ext_addr + 4);
}
+
#ifdef DEBUG
flash_printqry (&qry);
#endif
+
switch (info->vendor) {
case CFI_CMDSET_INTEL_STANDARD:
case CFI_CMDSET_INTEL_EXTENDED:
- default:
- info->cmd_reset = FLASH_CMD_RESET;
-#ifdef CFG_FLASH_PROTECTION
- /* read legacy lock/unlock bit from intel flash */
- if (info->ext_addr) {
- info->legacy_unlock = flash_read_uchar (info,
- info->ext_addr + 5) & 0x08;
- }
-#endif
+ cmdset_intel_init(info, &qry);
break;
case CFI_CMDSET_AMD_STANDARD:
case CFI_CMDSET_AMD_EXTENDED:
- info->cmd_reset = AMD_CMD_RESET;
- /* check if flash geometry needs reversal */
- if (num_erase_regions <= 1)
- break;
- /* reverse geometry if top boot part */
- if (info->cfi_version < 0x3131) {
- /* CFI < 1.1, try to guess from device id */
- if ((info->device_id & 0x80) != 0) {
- geometry_reversed = 1;
- }
- break;
- }
- /* CFI >= 1.1, deduct from top/bottom flag */
- /* note: ext_addr is valid since cfi_version > 0 */
- if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
- geometry_reversed = 1;
- }
+ cmdset_amd_init(info, &qry);
+ break;
+ default:
+ printf("CFI: Unknown command set 0x%x\n",
+ info->vendor);
+ /*
+ * Unfortunately, this means we don't know how
+ * to get the chip back to Read mode. Might
+ * as well try an Intel-style reset...
+ */
+ flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
+ return 0;
+ }
+
+ /* Do manufacturer-specific fixups */
+ switch (info->manufacturer_id) {
+ case 0x0001:
+ flash_fixup_amd(info, &qry);
+ break;
+ case 0x001f:
+ flash_fixup_atmel(info, &qry);
break;
}
sect_cnt = 0;
sector = base;
for (i = 0; i < num_erase_regions; i++) {
- unsigned int region = i;
-
if (i > NUM_ERASE_REGIONS) {
printf ("%d erase regions found, only %d used\n",
num_erase_regions, NUM_ERASE_REGIONS);
break;
}
- if (geometry_reversed)
- region = num_erase_regions - 1 - i;
- tmp = le32_to_cpu(qry.erase_region_info[region]);
- debug("erase region %u: 0x%08lx\n", region, tmp);
+ tmp = le32_to_cpu(qry.erase_region_info[i]);
+ debug("erase region %u: 0x%08lx\n", i, tmp);
erase_region_count = (tmp & 0xffff) + 1;
tmp >>= 16;
{
unsigned long size = 0;
int i;
+#if defined(CFG_FLASH_AUTOPROTECT_LIST)
+ struct apl_s {
+ ulong start;
+ ulong size;
+ } apl[] = CFG_FLASH_AUTOPROTECT_LIST;
+#endif
#ifdef CFG_FLASH_PROTECTION
char *s = getenv("unlock");
CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
flash_get_info(CFG_ENV_ADDR_REDUND));
#endif
+
+#if defined(CFG_FLASH_AUTOPROTECT_LIST)
+ for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) {
+ debug("autoprotecting from %08x to %08x\n",
+ apl[i].start, apl[i].start + apl[i].size - 1);
+ flash_protect (FLAG_PROTECT_SET,
+ apl[i].start,
+ apl[i].start + apl[i].size - 1,
+ flash_get_info(apl[i].start));
+ }
+#endif
return (size);
}
projects / platform / kernel / u-boot.git / blobdiff