common: Move ARM cache operations out of common.h

[platform/kernel/u-boot.git] / drivers / mmc / tmio-common.c

diff --git a/drivers/mmc/tmio-common.c b/drivers/mmc/tmio-common.c
index 2421915..669410d 100644 (file)
--- a/drivers/mmc/tmio-common.c
+++ b/drivers/mmc/tmio-common.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <clk.h>
+#include <cpu_func.h>
 #include <fdtdec.h>
 #include <mmc.h>
 #include <dm.h>
@@ -705,10 +706,14 @@ static void tmio_sd_host_init(struct tmio_sd_priv *priv)
         * This register dropped backward compatibility at version 0x10.
         * Write an appropriate value depending on the IP version.
         */
-       if (priv->version >= 0x10)
-               tmio_sd_writel(priv, 0x101, TMIO_SD_HOST_MODE);
-       else
+       if (priv->version >= 0x10) {
+               if (priv->caps & TMIO_SD_CAP_64BIT)
+                       tmio_sd_writel(priv, 0x000, TMIO_SD_HOST_MODE);
+               else
+                       tmio_sd_writel(priv, 0x101, TMIO_SD_HOST_MODE);
+       } else {
                tmio_sd_writel(priv, 0x0, TMIO_SD_HOST_MODE);
+       }
 
        if (priv->caps & TMIO_SD_CAP_DMA_INTERNAL) {
                tmp = tmio_sd_readl(priv, TMIO_SD_DMA_MODE);
@@ -779,7 +784,10 @@ int tmio_sd_probe(struct udevice *dev, u32 quirks)
        plat->cfg.f_min = mclk /
                        (priv->caps & TMIO_SD_CAP_DIV1024 ? 1024 : 512);
        plat->cfg.f_max = mclk;
-       plat->cfg.b_max = U32_MAX; /* max value of TMIO_SD_SECCNT */
+       if (quirks & TMIO_SD_CAP_16BIT)
+               plat->cfg.b_max = U16_MAX; /* max value of TMIO_SD_SECCNT */
+       else
+               plat->cfg.b_max = U32_MAX; /* max value of TMIO_SD_SECCNT */
 
        upriv->mmc = &plat->mmc;