Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

[platform/kernel/u-boot.git] / drivers / mmc / tegra2_mmc.c

diff --git a/drivers/mmc/tegra2_mmc.c b/drivers/mmc/tegra2_mmc.c
index 2bea07d..ccf48bb 100644 (file)
--- a/drivers/mmc/tegra2_mmc.c
+++ b/drivers/mmc/tegra2_mmc.c
@@ -116,34 +116,24 @@ static void mmc_set_transfer_mode(struct mmc_host *host, struct mmc_data *data)
        writew(mode, &host->reg->trnmod);
 }
 
-static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
-                       struct mmc_data *data)
+static int mmc_wait_inhibit(struct mmc_host *host,
+                           struct mmc_cmd *cmd,
+                           struct mmc_data *data,
+                           unsigned int timeout)
 {
-       struct mmc_host *host = (struct mmc_host *)mmc->priv;
-       int flags, i;
-       unsigned int timeout;
-       unsigned int mask;
-       unsigned int retry = 0x100000;
-       debug(" mmc_send_cmd called\n");
-
-       /* Wait max 10 ms */
-       timeout = 10;
-
        /*
         * PRNSTS
-        * CMDINHDAT[1] : Command Inhibit (DAT)
-        * CMDINHCMD[0] : Command Inhibit (CMD)
+        * CMDINHDAT[1] : Command Inhibit (DAT)
+        * CMDINHCMD[0] : Command Inhibit (CMD)
         */
-       mask = TEGRA_MMC_PRNSTS_CMD_INHIBIT_CMD;
-       if ((data != NULL) || (cmd->resp_type & MMC_RSP_BUSY))
-               mask |= TEGRA_MMC_PRNSTS_CMD_INHIBIT_DAT;
+       unsigned int mask = TEGRA_MMC_PRNSTS_CMD_INHIBIT_CMD;
 
        /*
         * We shouldn't wait for data inhibit for stop commands, even
         * though they might use busy signaling
         */
-       if (data)
-               mask &= ~TEGRA_MMC_PRNSTS_CMD_INHIBIT_DAT;
+       if ((data == NULL) && (cmd->resp_type & MMC_RSP_BUSY))
+               mask |= TEGRA_MMC_PRNSTS_CMD_INHIBIT_DAT;
 
        while (readl(&host->reg->prnsts) & mask) {
                if (timeout == 0) {
@@ -154,6 +144,24 @@ static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
                udelay(1000);
        }
 
+       return 0;
+}
+
+static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
+                       struct mmc_data *data)
+{
+       struct mmc_host *host = (struct mmc_host *)mmc->priv;
+       int flags, i;
+       int result;
+       unsigned int mask;
+       unsigned int retry = 0x100000;
+       debug(" mmc_send_cmd called\n");
+
+       result = mmc_wait_inhibit(host, cmd, data, 10 /* ms */);
+
+       if (result < 0)
+               return result;
+
        if (data)
                mmc_prepare_data(host, data);
 
@@ -260,6 +268,8 @@ static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
        }
 
        if (data) {
+               unsigned long   start = get_timer(0);
+
                while (1) {
                        mask = readl(&host->reg->norintsts);
 
@@ -270,13 +280,32 @@ static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
                                                __func__, mask);
                                return -1;
                        } else if (mask & TEGRA_MMC_NORINTSTS_DMA_INTERRUPT) {
-                               /* DMA Interrupt */
+                               /*
+                                * DMA Interrupt, restart the transfer where
+                                * it was interrupted.
+                                */
+                               unsigned int address = readl(&host->reg->sysad);
+
                                debug("DMA end\n");
-                               break;
+                               writel(TEGRA_MMC_NORINTSTS_DMA_INTERRUPT,
+                                      &host->reg->norintsts);
+                               writel(address, &host->reg->sysad);
                        } else if (mask & TEGRA_MMC_NORINTSTS_XFER_COMPLETE) {
                                /* Transfer Complete */
                                debug("r/w is done\n");
                                break;
+                       } else if (get_timer(start) > 2000UL) {
+                               writel(mask, &host->reg->norintsts);
+                               printf("%s: MMC Timeout\n"
+                                      "    Interrupt status        0x%08x\n"
+                                      "    Interrupt status enable 0x%08x\n"
+                                      "    Interrupt signal enable 0x%08x\n"
+                                      "    Present status          0x%08x\n",
+                                      __func__, mask,
+                                      readl(&host->reg->norintstsen),
+                                      readl(&host->reg->norintsigen),
+                                      readl(&host->reg->prnsts));
+                               return -1;
                        }
                }
                writel(mask, &host->reg->norintsts);
@@ -419,6 +448,7 @@ static int mmc_core_init(struct mmc *mmc)
         * NORMAL Interrupt Status Enable Register init
         * [5] ENSTABUFRDRDY : Buffer Read Ready Status Enable
         * [4] ENSTABUFWTRDY : Buffer write Ready Status Enable
+        * [3] ENSTADMAINT   : DMA boundary interrupt
         * [1] ENSTASTANSCMPLT : Transfre Complete Status Enable
         * [0] ENSTACMDCMPLT : Command Complete Status Enable
        */
@@ -426,6 +456,7 @@ static int mmc_core_init(struct mmc *mmc)
        mask &= ~(0xffff);
        mask |= (TEGRA_MMC_NORINTSTSEN_CMD_COMPLETE |
                 TEGRA_MMC_NORINTSTSEN_XFER_COMPLETE |
+                TEGRA_MMC_NORINTSTSEN_DMA_INTERRUPT |
                 TEGRA_MMC_NORINTSTSEN_BUFFER_WRITE_READY |
                 TEGRA_MMC_NORINTSTSEN_BUFFER_READ_READY);
        writel(mask, &host->reg->norintstsen);