"sdhci-caps-mask", 0);
dt_caps = dev_read_u64_default(host->mmc->dev,
"sdhci-caps", 0);
- caps = ~(u32)dt_caps_mask &
+ caps = ~lower_32_bits(dt_caps_mask) &
sdhci_readl(host, SDHCI_CAPABILITIES);
- caps |= (u32)dt_caps;
+ caps |= lower_32_bits(dt_caps);
#else
caps = sdhci_readl(host, SDHCI_CAPABILITIES);
#endif
/* Check whether the clock multiplier is supported or not */
if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {
#if CONFIG_IS_ENABLED(DM_MMC)
- caps_1 = ~(u32)(dt_caps_mask >> 32) &
+ caps_1 = ~upper_32_bits(dt_caps_mask) &
sdhci_readl(host, SDHCI_CAPABILITIES_1);
- caps_1 |= (u32)(dt_caps >> 32);
+ caps_1 |= upper_32_bits(dt_caps);
#else
caps_1 = sdhci_readl(host, SDHCI_CAPABILITIES_1);
#endif
if (host->quirks & SDHCI_QUIRK_BROKEN_VOLTAGE)
cfg->voltages |= host->voltages;
- cfg->host_caps |= MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT;
+ if (caps & SDHCI_CAN_DO_HISPD)
+ cfg->host_caps |= MMC_MODE_HS | MMC_MODE_HS_52MHz;
+
+ cfg->host_caps |= MMC_MODE_4BIT;
/* Since Host Controller Version3.0 */
if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {