fsl_esdhc: Add the workaround for erratum ESDHC135 (enable on P4080)

[platform/kernel/u-boot.git] / drivers / mmc / fsl_esdhc.c

diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 7bab2f6..d01c926 100644 (file)
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2007,2010 Freescale Semiconductor, Inc
+ * Copyright 2007, 2010-2011 Freescale Semiconductor, Inc
  * Andy Fleming
  *
  * Based vaguely on the pxa mmc code:
@@ -79,6 +79,9 @@ uint esdhc_xfertyp(struct mmc_cmd *cmd, struct mmc_data *data)
                if (data->blocks > 1) {
                        xfertyp |= XFERTYP_MSBSEL;
                        xfertyp |= XFERTYP_BCEN;
+#ifdef CONFIG_SYS_FSL_ERRATUM_ESDHC111
+                       xfertyp |= XFERTYP_AC12EN;
+#endif
                }
 
                if (data->flags & MMC_DATA_READ)
@@ -234,6 +237,11 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
        struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
        volatile struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base;
 
+#ifdef CONFIG_SYS_FSL_ERRATUM_ESDHC111
+       if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION)
+               return 0;
+#endif
+
        esdhc_write32(&regs->irqstat, -1);
 
        sync();
@@ -444,7 +452,7 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
 {
        struct fsl_esdhc *regs;
        struct mmc *mmc;
-       u32 caps;
+       u32 caps, voltage_caps;
 
        if (!cfg)
                return -1;
@@ -462,14 +470,29 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
        mmc->set_ios = esdhc_set_ios;
        mmc->init = esdhc_init;
 
+       voltage_caps = 0;
        caps = regs->hostcapblt;
 
+#ifdef CONFIG_SYS_FSL_ERRATUM_ESDHC135
+       caps = caps & ~(ESDHC_HOSTCAPBLT_SRS |
+                       ESDHC_HOSTCAPBLT_VS18 | ESDHC_HOSTCAPBLT_VS30);
+#endif
        if (caps & ESDHC_HOSTCAPBLT_VS18)
-               mmc->voltages |= MMC_VDD_165_195;
+               voltage_caps |= MMC_VDD_165_195;
        if (caps & ESDHC_HOSTCAPBLT_VS30)
-               mmc->voltages |= MMC_VDD_29_30 | MMC_VDD_30_31;
+               voltage_caps |= MMC_VDD_29_30 | MMC_VDD_30_31;
        if (caps & ESDHC_HOSTCAPBLT_VS33)
-               mmc->voltages |= MMC_VDD_32_33 | MMC_VDD_33_34;
+               voltage_caps |= MMC_VDD_32_33 | MMC_VDD_33_34;
+
+#ifdef CONFIG_SYS_SD_VOLTAGE
+       mmc->voltages = CONFIG_SYS_SD_VOLTAGE;
+#else
+       mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
+#endif
+       if ((mmc->voltages & voltage_caps) == 0) {
+               printf("voltage not supported by controller\n");
+               return -1;
+       }
 
        mmc->host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT;
 
@@ -498,17 +521,19 @@ int fsl_esdhc_mmc_init(bd_t *bis)
 void fdt_fixup_esdhc(void *blob, bd_t *bd)
 {
        const char *compat = "fsl,esdhc";
-       const char *status = "okay";
 
+#ifdef CONFIG_FSL_ESDHC_PIN_MUX
        if (!hwconfig("esdhc")) {
-               status = "disabled";
-               goto out;
+               do_fixup_by_compat(blob, compat, "status", "disabled",
+                               8 + 1, 1);
+               return;
        }
+#endif
 
        do_fixup_by_compat_u32(blob, compat, "clock-frequency",
                               gd->sdhc_clk, 1);
-out:
-       do_fixup_by_compat(blob, compat, "status", status,
-                          strlen(status) + 1, 1);
+
+       do_fixup_by_compat(blob, compat, "status", "okay",
+                          4 + 1, 1);
 }
 #endif