Add wait flags to support board/chip specific delays

[platform/kernel/u-boot.git] / drivers / misc / fsl_law.c

diff --git a/drivers/misc/fsl_law.c b/drivers/misc/fsl_law.c
index 2e94614..58340c1 100644 (file)
--- a/drivers/misc/fsl_law.c
+++ b/drivers/misc/fsl_law.c
@@ -38,7 +38,8 @@ DECLARE_GLOBAL_DATA_PTR;
       defined(CONFIG_MPC8568) || \
       defined(CONFIG_MPC8641) || defined(CONFIG_MPC8610)
 #define FSL_HW_NUM_LAWS 10
-#elif defined(CONFIG_MPC8536) || defined(CONFIG_MPC8572)
+#elif defined(CONFIG_MPC8536) || defined(CONFIG_MPC8572) || \
+      defined(CONFIG_P2020)
 #define FSL_HW_NUM_LAWS 12
 #else
 #error FSL_HW_NUM_LAWS not defined for this platform
@@ -46,12 +47,13 @@ DECLARE_GLOBAL_DATA_PTR;
 
 void set_law(u8 idx, phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
 {
-       volatile u32 *base = (volatile u32 *)(CFG_IMMR + 0xc08);
+       volatile u32 *base = (volatile u32 *)(CONFIG_SYS_IMMR + 0xc08);
        volatile u32 *lawbar = base + 8 * idx;
        volatile u32 *lawar = base + 8 * idx + 2;
 
        gd->used_laws |= (1 << idx);
 
+       out_be32(lawar, 0);
        out_be32(lawbar, addr >> 12);
        out_be32(lawar, LAWAR_EN | ((u32)id << 20) | (u32)sz);
 
@@ -91,7 +93,7 @@ int set_last_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
 
 void disable_law(u8 idx)
 {
-       volatile u32 *base = (volatile u32 *)(CFG_IMMR + 0xc08);
+       volatile u32 *base = (volatile u32 *)(CONFIG_SYS_IMMR + 0xc08);
        volatile u32 *lawbar = base + 8 * idx;
        volatile u32 *lawar = base + 8 * idx + 2;
 
@@ -105,7 +107,7 @@ void disable_law(u8 idx)
 
 void print_laws(void)
 {
-       volatile u32 *base = (volatile u32 *)(CFG_IMMR + 0xc08);
+       volatile u32 *base = (volatile u32 *)(CONFIG_SYS_IMMR + 0xc08);
        volatile u32 *lawbar = base;
        volatile u32 *lawar = base + 2;
        int i;