Merge tag 'arm-newsoc-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

[platform/kernel/linux-rpi.git] / drivers / irqchip / Kconfig

diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 4dd4f21..66b9fa4 100644 (file)
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -8,7 +8,7 @@ config IRQCHIP
 config ARM_GIC
        bool
        select IRQ_DOMAIN_HIERARCHY
-       select GENERIC_IRQ_EFFECTIVE_AFF_MASK
+       select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
 
 config ARM_GIC_PM
        bool
@@ -34,7 +34,7 @@ config ARM_GIC_V3
        bool
        select IRQ_DOMAIN_HIERARCHY
        select PARTITION_PERCPU
-       select GENERIC_IRQ_EFFECTIVE_AFF_MASK
+       select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
 
 config ARM_GIC_V3_ITS
        bool
@@ -76,7 +76,7 @@ config ARMADA_370_XP_IRQ
        bool
        select GENERIC_IRQ_CHIP
        select PCI_MSI if PCI
-       select GENERIC_IRQ_EFFECTIVE_AFF_MASK
+       select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
 
 config ALPINE_MSI
        bool
@@ -112,7 +112,7 @@ config BCM6345_L1_IRQ
        bool
        select GENERIC_IRQ_CHIP
        select IRQ_DOMAIN
-       select GENERIC_IRQ_EFFECTIVE_AFF_MASK
+       select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
 
 config BCM7038_L1_IRQ
        tristate "Broadcom STB 7038-style L1/L2 interrupt controller driver"
@@ -120,7 +120,7 @@ config BCM7038_L1_IRQ
        default ARCH_BRCMSTB || BMIPS_GENERIC
        select GENERIC_IRQ_CHIP
        select IRQ_DOMAIN
-       select GENERIC_IRQ_EFFECTIVE_AFF_MASK
+       select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
 
 config BCM7120_L2_IRQ
        tristate "Broadcom STB 7120-style L2 interrupt controller driver"
@@ -177,9 +177,9 @@ config MADERA_IRQ
 config IRQ_MIPS_CPU
        bool
        select GENERIC_IRQ_CHIP
-       select GENERIC_IRQ_IPI if SYS_SUPPORTS_MULTITHREADING
+       select GENERIC_IRQ_IPI if SMP && SYS_SUPPORTS_MULTITHREADING
        select IRQ_DOMAIN
-       select GENERIC_IRQ_EFFECTIVE_AFF_MASK
+       select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
 
 config CLPS711X_IRQCHIP
        bool
@@ -242,6 +242,14 @@ config RENESAS_RZA1_IRQC
          Enable support for the Renesas RZ/A1 Interrupt Controller, to use up
          to 8 external interrupts with configurable sense select.
 
+config RENESAS_RZG2L_IRQC
+       bool "Renesas RZ/G2L (and alike SoC) IRQC support" if COMPILE_TEST
+       select GENERIC_IRQ_CHIP
+       select IRQ_DOMAIN_HIERARCHY
+       help
+         Enable support for the Renesas RZ/G2L (and alike SoC) Interrupt Controller
+         for external devices.
+
 config SL28CPLD_INTC
        bool "Kontron sl28cpld IRQ controller"
        depends on MFD_SL28CPLD=y || COMPILE_TEST
@@ -294,11 +302,11 @@ config VERSATILE_FPGA_IRQ_NR
 config XTENSA_MX
        bool
        select IRQ_DOMAIN
-       select GENERIC_IRQ_EFFECTIVE_AFF_MASK
+       select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
 
 config XILINX_INTC
        bool "Xilinx Interrupt Controller IP"
-       depends on OF
+       depends on OF_ADDRESS
        select IRQ_DOMAIN
        help
          Support for the Xilinx Interrupt Controller IP core.
@@ -322,7 +330,8 @@ config KEYSTONE_IRQ
 
 config MIPS_GIC
        bool
-       select GENERIC_IRQ_IPI
+       select GENERIC_IRQ_IPI if SMP
+       select IRQ_DOMAIN_HIERARCHY
        select MIPS_CM
 
 config INGENIC_IRQ
@@ -530,6 +539,7 @@ config SIFIVE_PLIC
        bool "SiFive Platform-Level Interrupt Controller"
        depends on RISCV
        select IRQ_DOMAIN_HIERARCHY
+       select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
        help
           This enables support for the PLIC chip found in SiFive (and
           potentially other) RISC-V systems.  The PLIC controls devices
@@ -546,6 +556,16 @@ config EXYNOS_IRQ_COMBINER
          Say yes here to add support for the IRQ combiner devices embedded
          in Samsung Exynos chips.
 
+config IRQ_LOONGARCH_CPU
+       bool
+       select GENERIC_IRQ_CHIP
+       select IRQ_DOMAIN
+       select GENERIC_IRQ_EFFECTIVE_AFF_MASK
+       help
+         Support for the LoongArch CPU Interrupt Controller. For details of
+         irq chip hierarchy on LoongArch platforms please read the document
+         Documentation/loongarch/irq-chip-model.rst.
+
 config LOONGSON_LIOINTC
        bool "Loongson Local I/O Interrupt Controller"
        depends on MACH_LOONGSON64
@@ -555,6 +575,16 @@ config LOONGSON_LIOINTC
        help
          Support for the Loongson Local I/O Interrupt Controller.
 
+config LOONGSON_EIOINTC
+       bool "Loongson Extend I/O Interrupt Controller"
+       depends on LOONGARCH
+       depends on MACH_LOONGSON64
+       default MACH_LOONGSON64
+       select IRQ_DOMAIN_HIERARCHY
+       select GENERIC_IRQ_CHIP
+       help
+         Support for the Loongson3 Extend I/O Interrupt Vector Controller.
+
 config LOONGSON_HTPIC
        bool "Loongson3 HyperTransport PIC Controller"
        depends on MACH_LOONGSON64 && MIPS
@@ -574,7 +604,7 @@ config LOONGSON_HTVEC
 
 config LOONGSON_PCH_PIC
        bool "Loongson PCH PIC Controller"
-       depends on MACH_LOONGSON64 || COMPILE_TEST
+       depends on MACH_LOONGSON64
        default MACH_LOONGSON64
        select IRQ_DOMAIN_HIERARCHY
        select IRQ_FASTEOI_HIERARCHY_HANDLERS
@@ -583,7 +613,7 @@ config LOONGSON_PCH_PIC
 
 config LOONGSON_PCH_MSI
        bool "Loongson PCH MSI Controller"
-       depends on MACH_LOONGSON64 || COMPILE_TEST
+       depends on MACH_LOONGSON64
        depends on PCI
        default MACH_LOONGSON64
        select IRQ_DOMAIN_HIERARCHY
@@ -591,6 +621,14 @@ config LOONGSON_PCH_MSI
        help
          Support for the Loongson PCH MSI Controller.
 
+config LOONGSON_PCH_LPC
+       bool "Loongson PCH LPC Controller"
+       depends on MACH_LOONGSON64
+       default (MACH_LOONGSON64 && LOONGARCH)
+       select IRQ_DOMAIN_HIERARCHY
+       help
+         Support for the Loongson PCH LPC Controller.
+
 config MST_IRQ
        bool "MStar Interrupt Controller"
        depends on ARCH_MEDIATEK || ARCH_MSTARV7 || COMPILE_TEST