Merge branch 'master' of git://www.denx.de/git/u-boot-cfi-flash

[platform/kernel/u-boot.git] / drivers / i2c / tsi108_i2c.c

diff --git a/drivers/i2c/tsi108_i2c.c b/drivers/i2c/tsi108_i2c.c
index d6736b0..c077907 100644 (file)
--- a/drivers/i2c/tsi108_i2c.c
+++ b/drivers/i2c/tsi108_i2c.c
@@ -2,30 +2,12 @@
  * (C) Copyright 2004 Tundra Semiconductor Corp.
  * Author: Alex Bounine
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <config.h>
 #include <common.h>
 
-#ifdef CONFIG_TSI108_I2C
 #include <tsi108.h>
 
 #if defined(CONFIG_CMD_I2C)
@@ -42,6 +24,15 @@
 /* All functions assume that Tsi108 I2C block is the only master on the bus */
 /* I2C read helper function */
 
+void i2c_init(int speed, int slaveaddr)
+{
+       /*
+        * The TSI108 has a fixed I2C clock rate and doesn't support slave
+        * operation.  This function only exists as a stub to fit into the
+        * U-Boot I2C API.
+        */
+}
+
 static int i2c_read_byte (
                uint i2c_chan,  /* I2C channel number: 0 - main, 1 - SDC SPD */
                uchar chip_addr,/* I2C device address on the bus */
@@ -61,14 +52,14 @@ static int i2c_read_byte (
                chan_offset = TSI108_I2C_SDRAM_OFFSET;
 
        /* Check if I2C operation is in progress */
-       temp = *(u32 *) (CFG_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2);
+       temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2);
 
        if (0 == (temp & (I2C_CNTRL2_RD_STATUS | I2C_CNTRL2_WR_STATUS |
                          I2C_CNTRL2_START))) {
                /* Set device address and operation (read = 0) */
                temp = (byte_addr << 16) | ((chip_addr & 0x07) << 8) |
                    ((chip_addr >> 3) & 0x0F);
-               *(u32 *) (CFG_TSI108_CSR_BASE + chan_offset + I2C_CNTRL1) =
+               *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_CNTRL1) =
                    temp;
 
                /* Issue the read command
@@ -76,13 +67,13 @@ static int i2c_read_byte (
                 * (size = 1 byte, lane = 0)
                 */
 
-               *(u32 *) (CFG_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2) =
+               *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2) =
                    (I2C_CNTRL2_START);
 
                /* Wait until operation completed */
                do {
                        /* Read I2C operation status */
-                       temp = *(u32 *) (CFG_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2);
+                       temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2);
 
                        if (0 == (temp & (I2C_CNTRL2_RD_STATUS | I2C_CNTRL2_START))) {
                                if (0 == (temp &
@@ -91,7 +82,7 @@ static int i2c_read_byte (
                                    ) {
                                        op_status = TSI108_I2C_SUCCESS;
 
-                                       temp = *(u32 *) (CFG_TSI108_CSR_BASE +
+                                       temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE +
                                                         chan_offset +
                                                         I2C_RD_DATA);
 
@@ -121,7 +112,7 @@ static int i2c_read_byte (
  *   chip_addr: I2C chip address, range 0..127
  *                  (to read from SPD channel EEPROM use (0xD0 ... 0xD7)
  *              NOTE: The bit 7 in the chip_addr serves as a channel select.
- *              This hack is for enabling "isdram" command on Tsi108 boards
+ *              This hack is for enabling "i2c sdram" command on Tsi108 boards
  *              without changes to common code. Used for I2C reads only.
  *   byte_addr: Memory or register address within the chip
  *   alen:      Number of bytes to use for addr (typically 1, 2 for larger
@@ -173,25 +164,25 @@ static int i2c_write_byte (uchar chip_addr,/* I2C device address on the bus */
        u32 op_status = TSI108_I2C_TIMEOUT_ERR;
 
        /* Check if I2C operation is in progress */
-       temp = *(u32 *) (CFG_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_CNTRL2);
+       temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_CNTRL2);
 
        if (0 == (temp & (I2C_CNTRL2_RD_STATUS | I2C_CNTRL2_WR_STATUS | I2C_CNTRL2_START))) {
                /* Place data into the I2C Tx Register */
-               *(u32 *) (CFG_TSI108_CSR_BASE + TSI108_I2C_OFFSET +
+               *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET +
                          I2C_TX_DATA) = (u32) * buffer;
 
                /* Set device address and operation  */
                temp =
                    I2C_CNTRL1_I2CWRITE | (byte_addr << 16) |
                    ((chip_addr & 0x07) << 8) | ((chip_addr >> 3) & 0x0F);
-               *(u32 *) (CFG_TSI108_CSR_BASE + TSI108_I2C_OFFSET +
+               *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET +
                          I2C_CNTRL1) = temp;
 
                /* Issue the write command (at this moment all other parameters
                 * are 0 (size = 1 byte, lane = 0)
                 */
 
-               *(u32 *) (CFG_TSI108_CSR_BASE + TSI108_I2C_OFFSET +
+               *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET +
                          I2C_CNTRL2) = (I2C_CNTRL2_START);
 
                op_status = TSI108_I2C_TIMEOUT_ERR;
@@ -199,7 +190,7 @@ static int i2c_write_byte (uchar chip_addr,/* I2C device address on the bus */
                /* Wait until operation completed */
                do {
                        /* Read I2C operation status */
-                       temp = *(u32 *) (CFG_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_CNTRL2);
+                       temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_CNTRL2);
 
                        if (0 == (temp & (I2C_CNTRL2_WR_STATUS | I2C_CNTRL2_START))) {
                                if (0 == (temp &
@@ -280,4 +271,3 @@ int i2c_probe (uchar chip)
 }
 
 #endif
-#endif /* CONFIG_TSI108_I2C */