Prepare v2023.10

[platform/kernel/u-boot.git] / drivers / i2c / sh_i2c.c

diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c
index cc19100..3335d94 100644 (file)
--- a/drivers/i2c/sh_i2c.c
+++ b/drivers/i2c/sh_i2c.c
@@ -1,13 +1,18 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2011, 2013 Renesas Solutions Corp.
  * Copyright (C) 2011, 2013 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
  *
- * SPDX-License-Identifier:    GPL-2.0+
+ * NOTE: This driver should be converted to driver model before June 2017.
+ * Please see doc/driver-model/i2c-howto.rst for instructions.
  */
 
 #include <common.h>
 #include <i2c.h>
+#include <log.h>
+#include <asm/global_data.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -167,14 +172,9 @@ static int sh_i2c_raw_read(struct sh_i2c *dev, u8 chip, u8 addr)
 {
        int ret = -1;
 
-#if defined(CONFIG_SH73A0)
-       if (sh_i2c_set_addr(dev, chip, addr, 0) != 0)
-               goto exit0;
-#else
        if (sh_i2c_set_addr(dev, chip, addr, 1) != 0)
                goto exit0;
        udelay(100);
-#endif
 
        writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_RTS|SH_I2C_ICCR_BUSY), &dev->iccr);
        sh_irq_dte(dev);
@@ -269,7 +269,9 @@ static int sh_i2c_write(struct i2c_adapter *adap, uint8_t chip, uint addr,
 static int
 sh_i2c_probe(struct i2c_adapter *adap, u8 dev)
 {
-       return sh_i2c_read(adap, dev, 0, 0, NULL, 0);
+       u8 dummy[1];
+
+       return sh_i2c_read(adap, dev, 0, 0, dummy, sizeof dummy);
 }
 
 static unsigned int sh_i2c_set_bus_speed(struct i2c_adapter *adap,
@@ -287,20 +289,20 @@ static unsigned int sh_i2c_set_bus_speed(struct i2c_adapter *adap,
  * Register RCAR i2c adapters
  */
 U_BOOT_I2C_ADAP_COMPLETE(sh_0, sh_i2c_init, sh_i2c_probe, sh_i2c_read,
-       sh_i2c_write, sh_i2c_set_bus_speed, CONFIG_SYS_I2C_SH_SPEED0, 0, 0)
+       sh_i2c_write, sh_i2c_set_bus_speed, CONFIG_SYS_I2C_SPEED, 0, 0)
 #ifdef CONFIG_SYS_I2C_SH_BASE1
 U_BOOT_I2C_ADAP_COMPLETE(sh_1, sh_i2c_init, sh_i2c_probe, sh_i2c_read,
-       sh_i2c_write, sh_i2c_set_bus_speed, CONFIG_SYS_I2C_SH_SPEED1, 0, 1)
+       sh_i2c_write, sh_i2c_set_bus_speed, CONFIG_SYS_I2C_SPEED, 0, 1)
 #endif
 #ifdef CONFIG_SYS_I2C_SH_BASE2
 U_BOOT_I2C_ADAP_COMPLETE(sh_2, sh_i2c_init, sh_i2c_probe, sh_i2c_read,
-       sh_i2c_write, sh_i2c_set_bus_speed, CONFIG_SYS_I2C_SH_SPEED2, 0, 2)
+       sh_i2c_write, sh_i2c_set_bus_speed, CONFIG_SYS_I2C_SPEED, 0, 2)
 #endif
 #ifdef CONFIG_SYS_I2C_SH_BASE3
 U_BOOT_I2C_ADAP_COMPLETE(sh_3, sh_i2c_init, sh_i2c_probe, sh_i2c_read,
-       sh_i2c_write, sh_i2c_set_bus_speed, CONFIG_SYS_I2C_SH_SPEED3, 0, 3)
+       sh_i2c_write, sh_i2c_set_bus_speed, CONFIG_SYS_I2C_SPEED, 0, 3)
 #endif
 #ifdef CONFIG_SYS_I2C_SH_BASE4
 U_BOOT_I2C_ADAP_COMPLETE(sh_4, sh_i2c_init, sh_i2c_probe, sh_i2c_read,
-       sh_i2c_write, sh_i2c_set_bus_speed, CONFIG_SYS_I2C_SH_SPEED4, 0, 4)
+       sh_i2c_write, sh_i2c_set_bus_speed, CONFIG_SYS_I2C_SPEED, 0, 4)
 #endif