Merge branch '2021-07-28-build-improvements'

[platform/kernel/u-boot.git] / drivers / i2c / Kconfig

diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index 403602f..63d03a3 100644 (file)
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -2,7 +2,29 @@
 # I2C subsystem configuration
 #
 
-menu "I2C support"
+menuconfig I2C
+       bool "I2C support"
+       default y
+       help
+         Note:
+         This is a stand-in for an option to enable I2C support. In fact this
+         simply enables building of the I2C directory for U-Boot. The actual
+         I2C feature is enabled by DM_I2C (for driver model) and
+         the #define CONFIG_SYS_I2C_LEGACY (for the legacy I2C stack).
+
+         So at present there is no need to ever disable this option.
+
+         Eventually it will:
+
+         Enable support for the I2C (Inter-Integrated Circuit) bus in U-Boot.
+         I2C works with a clock and data line which can be driven by a
+         one or more masters or slaves. It is a fairly complex bus but is
+         widely used as it only needs two lines for communication. Speeds of
+         400kbps are typical but up to 3.4Mbps is supported by some
+         hardware. Enable this option to build the drivers in drivers/i2c as
+         part of a U-Boot build.
+
+if I2C
 
 config DM_I2C
        bool "Enable Driver Model for I2C drivers"
@@ -14,6 +36,17 @@ config DM_I2C
          device (bus child) info is kept as parent plat. The interface
          is defined in include/i2c.h.
 
+config SPL_DM_I2C
+       bool "Enable Driver Model for I2C drivers in SPL"
+       depends on SPL_DM && DM_I2C
+       default y
+       help
+         Enable driver model for I2C. The I2C uclass interface: probe, read,
+         write and speed, is implemented with the bus drivers operations,
+         which provide methods for bus setting and data transfer. Each chip
+         device (bus child) info is kept as parent platdata. The interface
+         is defined in include/i2c.h.
+
 config I2C_CROS_EC_TUNNEL
        tristate "Chrome OS EC tunnel I2C bus"
        depends on CROS_EC
@@ -61,6 +94,16 @@ config DM_I2C_GPIO
          bindings are supported.
          Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
 
+config SPL_DM_I2C_GPIO
+       bool "Enable Driver Model for software emulated I2C bus driver in SPL"
+       depends on SPL_DM && DM_I2C_GPIO && SPL_DM_GPIO && SPL_GPIO
+       default y
+       help
+         Enable the i2c bus driver emulation by using the GPIOs. The bus GPIO
+         configuration is given by the device tree. Kernel-style device tree
+         bindings are supported.
+         Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
+
 config SYS_I2C_AT91
        bool "Atmel I2C driver"
        depends on DM_I2C && ARCH_AT91
@@ -115,16 +158,6 @@ config SYS_I2C_DW
          controller is used in various SoCs, e.g. the ST SPEAr, Altera
          SoCFPGA, Synopsys ARC700 and some Intel x86 SoCs.
 
-config SYS_I2C_DW_ENABLE_STATUS_UNSUPPORTED
-       bool "DW I2C Enable Status Register not supported"
-       depends on SYS_I2C_DW && (TARGET_SPEAR300 || TARGET_SPEAR310 || \
-               TARGET_SPEAR320 || TARGET_SPEAR600 || TARGET_X600)
-       default y
-       help
-         Some versions of the Designware I2C controller do not support the
-         enable status register. This config option can be enabled in such
-         cases.
-
 config SYS_I2C_ASPEED
        bool "Aspeed I2C Controller"
        depends on DM_I2C && ARCH_ASPEED
@@ -148,6 +181,12 @@ config SYS_I2C_IMX_LPI2C
        help
          Add support for the NXP i.MX LPI2C driver.
 
+config SYS_I2C_LPC32XX
+       bool "LPC32XX I2C driver"
+       depends on ARCH_LPC32XX
+       help
+         Enable support for the LPC32xx I2C driver.
+
 config SYS_I2C_MESON
        bool "Amlogic Meson I2C driver"
        depends on DM_I2C && ARCH_MESON
@@ -222,7 +261,7 @@ endif
 if SYS_I2C_MXC_I2C1
 config SYS_MXC_I2C1_SPEED
        int "I2C Channel 1 speed"
-       default 40000000 if TARGET_LS2080A_SIMU || TARGET_LS2080A_EMU
+       default 40000000 if TARGET_LS2080A_EMU
        default 100000
        help
         MXC I2C Channel 1 speed
@@ -237,7 +276,7 @@ endif
 if SYS_I2C_MXC_I2C2
 config SYS_MXC_I2C2_SPEED
        int "I2C Channel 2 speed"
-       default 40000000 if TARGET_LS2080A_SIMU || TARGET_LS2080A_EMU
+       default 40000000 if TARGET_LS2080A_EMU
        default 100000
        help
         MXC I2C Channel 2 speed
@@ -434,6 +473,13 @@ config SYS_I2C_STM32F7
           _ Optional clock stretching
           _ Software reset
 
+config SYS_I2C_SYNQUACER
+       bool "Socionext SynQuacer I2C controller"
+       depends on ARCH_SYNQUACER && DM_I2C
+       help
+         Support for Socionext Synquacer I2C controller. This I2C controller
+         will be used for RTC and LS-connector on DeveloperBox.
+
 config SYS_I2C_TEGRA
        bool "NVIDIA Tegra internal I2C controller"
        depends on ARCH_TEGRA
@@ -458,7 +504,7 @@ config SYS_I2C_UNIPHIER_F
 
 config SYS_I2C_VERSATILE
        bool "Arm Ltd Versatile I2C bus driver"
-       depends on DM_I2C && (TARGET_VEXPRESS_CA15_TC2 || TARGET_VEXPRESS64_JUNO)
+       depends on DM_I2C && TARGET_VEXPRESS64_JUNO
        help
          Add support for the Arm Ltd Versatile Express I2C driver. The I2C host
          controller is present in the development boards manufactured by Arm Ltd.
@@ -504,4 +550,4 @@ config SYS_I2C_IHS
 
 source "drivers/i2c/muxes/Kconfig"
 
-endmenu
+endif