Backmerge remote-tracking branch 'drm/drm-next' into drm-misc-next

[platform/kernel/linux-rpi.git] / drivers / gpu / drm / meson / meson_dw_hdmi.c

diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c
index 24a12c4..29a8ff4 100644 (file)
--- a/drivers/gpu/drm/meson/meson_dw_hdmi.c
+++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c
@@ -297,7 +297,7 @@ static inline void dw_hdmi_dwc_write_bits(struct meson_dw_hdmi *dw_hdmi,
 
 /* Setup PHY bandwidth modes */
 static void meson_hdmi_phy_setup_mode(struct meson_dw_hdmi *dw_hdmi,
-                                     struct drm_display_mode *mode)
+                                     const struct drm_display_mode *mode)
 {
        struct meson_drm *priv = dw_hdmi->priv;
        unsigned int pixel_clock = mode->clock;
@@ -427,7 +427,8 @@ static void dw_hdmi_set_vclk(struct meson_dw_hdmi *dw_hdmi,
 }
 
 static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data,
-                           struct drm_display_mode *mode)
+                           const struct drm_display_info *display,
+                           const struct drm_display_mode *mode)
 {
        struct meson_dw_hdmi *dw_hdmi = (struct meson_dw_hdmi *)data;
        struct meson_drm *priv = dw_hdmi->priv;
@@ -496,7 +497,7 @@ static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data,
        /* Disable clock, fifo, fifo_wr */
        regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1, 0xf, 0);
 
-       dw_hdmi_set_high_tmds_clock_ratio(hdmi);
+       dw_hdmi_set_high_tmds_clock_ratio(hdmi, display);
 
        msleep(100);
 
@@ -630,11 +631,13 @@ static irqreturn_t dw_hdmi_top_thread_irq(int irq, void *dev_id)
 }
 
 static enum drm_mode_status
-dw_hdmi_mode_valid(struct drm_connector *connector,
+dw_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data,
+                  const struct drm_display_info *display_info,
                   const struct drm_display_mode *mode)
 {
-       struct meson_drm *priv = connector->dev->dev_private;
-       bool is_hdmi2_sink = connector->display_info.hdmi.scdc.supported;
+       struct meson_dw_hdmi *dw_hdmi = data;
+       struct meson_drm *priv = dw_hdmi->priv;
+       bool is_hdmi2_sink = display_info->hdmi.scdc.supported;
        unsigned int phy_freq;
        unsigned int vclk_freq;
        unsigned int venc_freq;
@@ -645,10 +648,10 @@ dw_hdmi_mode_valid(struct drm_connector *connector,
        DRM_DEBUG_DRIVER("Modeline " DRM_MODE_FMT "\n", DRM_MODE_ARG(mode));
 
        /* If sink does not support 540MHz, reject the non-420 HDMI2 modes */
-       if (connector->display_info.max_tmds_clock &&
-           mode->clock > connector->display_info.max_tmds_clock &&
-           !drm_mode_is_420_only(&connector->display_info, mode) &&
-           !drm_mode_is_420_also(&connector->display_info, mode))
+       if (display_info->max_tmds_clock &&
+           mode->clock > display_info->max_tmds_clock &&
+           !drm_mode_is_420_only(display_info, mode) &&
+           !drm_mode_is_420_also(display_info, mode))
                return MODE_BAD;
 
        /* Check against non-VIC supported modes */
@@ -665,9 +668,9 @@ dw_hdmi_mode_valid(struct drm_connector *connector,
        vclk_freq = mode->clock;
 
        /* For 420, pixel clock is half unlike venc clock */
-       if (drm_mode_is_420_only(&connector->display_info, mode) ||
+       if (drm_mode_is_420_only(display_info, mode) ||
            (!is_hdmi2_sink &&
-            drm_mode_is_420_also(&connector->display_info, mode)))
+            drm_mode_is_420_also(display_info, mode)))
                vclk_freq /= 2;
 
        /* TMDS clock is pixel_clock * 10 */
@@ -682,9 +685,9 @@ dw_hdmi_mode_valid(struct drm_connector *connector,
 
        /* VENC double pixels for 1080i, 720p and YUV420 modes */
        if (meson_venc_hdmi_venc_repeat(vic) ||
-           drm_mode_is_420_only(&connector->display_info, mode) ||
+           drm_mode_is_420_only(display_info, mode) ||
            (!is_hdmi2_sink &&
-            drm_mode_is_420_also(&connector->display_info, mode)))
+            drm_mode_is_420_also(display_info, mode)))
                venc_freq *= 2;
 
        vclk_freq = max(venc_freq, hdmi_freq);
@@ -692,7 +695,7 @@ dw_hdmi_mode_valid(struct drm_connector *connector,
        if (mode->flags & DRM_MODE_FLAG_DBLCLK)
                venc_freq /= 2;
 
-       dev_dbg(connector->dev->dev, "%s: vclk:%d phy=%d venc=%d hdmi=%d\n",
+       dev_dbg(dw_hdmi->dev, "%s: vclk:%d phy=%d venc=%d hdmi=%d\n",
                __func__, phy_freq, vclk_freq, venc_freq, hdmi_freq);
 
        return meson_vclk_vic_supported_freq(priv, phy_freq, vclk_freq);
@@ -1065,6 +1068,7 @@ static int meson_dw_hdmi_bind(struct device *dev, struct device *master,
 
        /* Bridge / Connector */
 
+       dw_plat_data->priv_data = meson_dw_hdmi;
        dw_plat_data->mode_valid = dw_hdmi_mode_valid;
        dw_plat_data->phy_ops = &meson_dw_hdmi_phy_ops;
        dw_plat_data->phy_name = "meson_dw_hdmi_phy";