Merge drm/drm-next into drm-intel-next-queued

[platform/kernel/linux-rpi.git] / drivers / gpu / drm / i915 / intel_display.c

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 5e7b907..4c5c2b3 100644 (file)
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -46,6 +46,7 @@
 #include <drm/drm_crtc_helper.h>
 #include <drm/drm_plane_helper.h>
 #include <drm/drm_rect.h>
+#include <drm/drm_atomic_uapi.h>
 #include <linux/dma_remapping.h>
 #include <linux/reservation.h>
 
@@ -6734,22 +6735,20 @@ intel_reduce_m_n_ratio(uint32_t *num, uint32_t *den)
 
 static void compute_m_n(unsigned int m, unsigned int n,
                        uint32_t *ret_m, uint32_t *ret_n,
-                       bool reduce_m_n)
+                       bool constant_n)
 {
        /*
-        * Reduce M/N as much as possible without loss in precision. Several DP
-        * dongles in particular seem to be fussy about too large *link* M/N
-        * values. The passed in values are more likely to have the least
-        * significant bits zero than M after rounding below, so do this first.
+        * Several DP dongles in particular seem to be fussy about
+        * too large link M/N values. Give N value as 0x8000 that
+        * should be acceptable by specific devices. 0x8000 is the
+        * specified fixed N value for asynchronous clock mode,
+        * which the devices expect also in synchronous clock mode.
         */
-       if (reduce_m_n) {
-               while ((m & 1) == 0 && (n & 1) == 0) {
-                       m >>= 1;
-                       n >>= 1;
-               }
-       }
+       if (constant_n)
+               *ret_n = 0x8000;
+       else
+               *ret_n = min_t(unsigned int, roundup_pow_of_two(n), DATA_LINK_N_MAX);
 
-       *ret_n = min_t(unsigned int, roundup_pow_of_two(n), DATA_LINK_N_MAX);
        *ret_m = div_u64((uint64_t) m * *ret_n, n);
        intel_reduce_m_n_ratio(ret_m, ret_n);
 }
@@ -6758,18 +6757,18 @@ void
 intel_link_compute_m_n(int bits_per_pixel, int nlanes,
                       int pixel_clock, int link_clock,
                       struct intel_link_m_n *m_n,
-                      bool reduce_m_n)
+                      bool constant_n)
 {
        m_n->tu = 64;
 
        compute_m_n(bits_per_pixel * pixel_clock,
                    link_clock * nlanes * 8,
                    &m_n->gmch_m, &m_n->gmch_n,
-                   reduce_m_n);
+                   constant_n);
 
        compute_m_n(pixel_clock, link_clock,
                    &m_n->link_m, &m_n->link_n,
-                   reduce_m_n);
+                   constant_n);
 }
 
 static inline bool intel_panel_use_ssc(struct drm_i915_private *dev_priv)
@@ -13003,6 +13002,8 @@ static const struct drm_crtc_funcs intel_crtc_funcs = {
        .atomic_duplicate_state = intel_crtc_duplicate_state,
        .atomic_destroy_state = intel_crtc_destroy_state,
        .set_crc_source = intel_crtc_set_crc_source,
+       .verify_crc_source = intel_crtc_verify_crc_source,
+       .get_crc_sources = intel_crtc_get_crc_sources,
 };
 
 struct wait_rps_boost {