drm/i915: Update DRIVER_DATE to 20180906

[platform/kernel/linux-rpi.git] / drivers / gpu / drm / i915 / i915_drv.h

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 6fa6140..f63dca7 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -86,8 +86,8 @@
 
 #define DRIVER_NAME            "i915"
 #define DRIVER_DESC            "Intel Graphics"
-#define DRIVER_DATE            "20180719"
-#define DRIVER_TIMESTAMP       1532015279
+#define DRIVER_DATE            "20180906"
+#define DRIVER_TIMESTAMP       1536236058
 
 /* Use I915_STATE_WARN(x) and I915_STATE_WARN_ON() (rather than WARN() and
  * WARN_ON()) for hw state sanity checks to check for unexpected conditions
@@ -611,8 +611,18 @@ struct i915_drrs {
 
 struct i915_psr {
        struct mutex lock;
+
+#define I915_PSR_DEBUG_MODE_MASK       0x0f
+#define I915_PSR_DEBUG_DEFAULT         0x00
+#define I915_PSR_DEBUG_DISABLE         0x01
+#define I915_PSR_DEBUG_ENABLE          0x02
+#define I915_PSR_DEBUG_FORCE_PSR1      0x03
+#define I915_PSR_DEBUG_IRQ             0x10
+
+       u32 debug;
        bool sink_support;
-       struct intel_dp *enabled;
+       bool prepared, enabled;
+       struct intel_dp *dp;
        bool active;
        struct work_struct work;
        unsigned busy_frontbuffer_bits;
@@ -622,7 +632,6 @@ struct i915_psr {
        bool alpm;
        bool psr2_enabled;
        u8 sink_sync_latency;
-       bool debug;
        ktime_t last_entry_attempt;
        ktime_t last_exit;
 };
@@ -867,6 +876,13 @@ struct i915_power_well_ops {
                           struct i915_power_well *power_well);
 };
 
+struct i915_power_well_regs {
+       i915_reg_t bios;
+       i915_reg_t driver;
+       i915_reg_t kvmr;
+       i915_reg_t debug;
+};
+
 /* Power well structure for haswell */
 struct i915_power_well_desc {
        const char *name;
@@ -890,6 +906,12 @@ struct i915_power_well_desc {
                        enum dpio_phy phy;
                } bxt;
                struct {
+                       const struct i915_power_well_regs *regs;
+                       /*
+                        * request/status flag index in the power well
+                        * constrol/status registers.
+                        */
+                       u8 idx;
                        /* Mask of pipes whose IRQ logic is backed by the pw */
                        u8 irq_pipe_mask;
                        /* The pw is backing the VGA functionality */
@@ -913,8 +935,8 @@ struct i915_power_domains {
         * Power wells needed for initialization at driver init and suspend
         * time are on. They are kept on until after the first modeset.
         */
-       bool init_power_on;
        bool initializing;
+       bool display_core_suspended;
        int power_well_count;
 
        struct mutex lock;
@@ -1621,7 +1643,8 @@ struct drm_i915_private {
        struct mutex gmbus_mutex;
 
        /**
-        * Base address of the gmbus and gpio block.
+        * Base address of where the gmbus and gpio blocks are located (either
+        * on PCH or on SoC for platforms without PCH).
         */
        uint32_t gpio_mmio_base;
 
@@ -1643,7 +1666,6 @@ struct drm_i915_private {
        struct intel_engine_cs *engine_class[MAX_ENGINE_CLASS + 1]
                                            [MAX_ENGINE_INSTANCE + 1];
 
-       struct drm_dma_handle *status_page_dmah;
        struct resource mch_res;
 
        /* protects the irq masks */
@@ -1839,6 +1861,7 @@ struct drm_i915_private {
        struct mutex av_mutex;
 
        struct {
+               struct mutex mutex;
                struct list_head list;
                struct llist_head free_list;
                struct work_struct free_work;
@@ -1851,6 +1874,7 @@ struct drm_i915_private {
 #define MAX_CONTEXT_HW_ID (1<<21) /* exclusive */
 #define MAX_GUC_CONTEXT_HW_ID (1 << 20) /* exclusive */
 #define GEN11_MAX_CONTEXT_HW_ID (1<<11) /* exclusive */
+               struct list_head hw_id_list;
        } contexts;
 
        u32 fdi_rx_config;
@@ -2784,6 +2808,8 @@ extern void intel_irq_fini(struct drm_i915_private *dev_priv);
 int intel_irq_install(struct drm_i915_private *dev_priv);
 void intel_irq_uninstall(struct drm_i915_private *dev_priv);
 
+void i915_clear_error_registers(struct drm_i915_private *dev_priv);
+
 static inline bool intel_gvt_active(struct drm_i915_private *dev_priv)
 {
        return dev_priv->gvt;