DSPLINOFF(i9xx_plane));
base = intel_de_read(dev_priv, DSPSURF(i9xx_plane)) & DISP_ADDR_MASK;
} else {
+ offset = 0;
base = intel_de_read(dev_priv, DSPADDR(i9xx_plane));
}
plane_config->base = base;
+ drm_WARN_ON(&dev_priv->drm, offset != 0);
+
val = intel_de_read(dev_priv, PIPESRC(pipe));
fb->width = REG_FIELD_GET(PIPESRC_WIDTH_MASK, val) + 1;
fb->height = REG_FIELD_GET(PIPESRC_HEIGHT_MASK, val) + 1;