+// SPDX-License-Identifier: GPL-2.0+
/*
* NVIDIA Tegra20 GPIO handling.
* (C) Copyright 2010-2012,2015
* NVIDIA Corporation <www.nvidia.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
/*
#include <common.h>
#include <dm.h>
+#include <log.h>
#include <malloc.h>
#include <errno.h>
#include <fdtdec.h>
#include <dm/device-internal.h>
#include <dt-bindings/gpio/gpio.h>
-DECLARE_GLOBAL_DATA_PTR;
-
static const int CONFIG_SFIO = 0;
static const int CONFIG_GPIO = 1;
static const int DIRECTION_INPUT = 0;
static const int DIRECTION_OUTPUT = 1;
-struct tegra_gpio_platdata {
+struct tegra_gpio_plat {
struct gpio_ctlr_bank *bank;
const char *port_name; /* Name of port, e.g. "B" */
int base_gpio; /* Port number for this port (0, 1,.., n-1) */
static int gpio_tegra_probe(struct udevice *dev)
{
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
- struct tegra_port_info *priv = dev->priv;
- struct tegra_gpio_platdata *plat = dev->platdata;
+ struct tegra_port_info *priv = dev_get_priv(dev);
+ struct tegra_gpio_plat *plat = dev_get_plat(dev);
/* Only child devices have ports */
if (!plat)
*/
static int gpio_tegra_bind(struct udevice *parent)
{
- struct tegra_gpio_platdata *plat = parent->platdata;
+ struct tegra_gpio_plat *plat = dev_get_plat(parent);
struct gpio_ctlr *ctlr;
int bank_count;
int bank;
* This driver does not make use of interrupts, other than to figure
* out the number of GPIO banks
*/
- if (!fdt_getprop(gd->fdt_blob, dev_of_offset(parent), "interrupts",
- &len))
- return -EINVAL;
+ len = dev_read_size(parent, "interrupts");
+ if (len < 0)
+ return len;
bank_count = len / 3 / sizeof(u32);
- ctlr = (struct gpio_ctlr *)devfdt_get_addr(parent);
+ ctlr = (struct gpio_ctlr *)dev_read_addr(parent);
+ if ((ulong)ctlr == FDT_ADDR_T_NONE)
+ return -EINVAL;
}
#endif
for (bank = 0; bank < bank_count; bank++) {
int port;
for (port = 0; port < TEGRA_PORTS_PER_BANK; port++) {
- struct tegra_gpio_platdata *plat;
+ struct tegra_gpio_plat *plat;
struct udevice *dev;
int base_port;
plat->port_name = gpio_port_name(base_port);
ret = device_bind(parent, parent->driver,
- plat->port_name, plat, -1, &dev);
+ plat->port_name, plat,
+ dev_ofnode(parent), &dev);
if (ret)
return ret;
- dev_set_of_offset(dev, dev_of_offset(parent));
}
}
.of_match = tegra_gpio_ids,
.bind = gpio_tegra_bind,
.probe = gpio_tegra_probe,
- .priv_auto_alloc_size = sizeof(struct tegra_port_info),
+ .priv_auto = sizeof(struct tegra_port_info),
.ops = &gpio_tegra_ops,
- .flags = DM_FLAG_PRE_RELOC,
};