* Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
*/
+#define LOG_CATEGORY UCLASS_GPIO
+
#include <common.h>
#include <clk.h>
#include <dm.h>
#include <fdtdec.h>
#include <log.h>
-#include <asm/arch/gpio.h>
#include <asm/arch/stm32.h>
#include <asm/gpio.h>
#include <asm/io.h>
#include <linux/errno.h>
#include <linux/io.h>
+#include "stm32_gpio_priv.h"
+
+#define STM32_GPIOS_PER_BANK 16
+
#define MODE_BITS(gpio_pin) ((gpio_pin) * 2)
#define MODE_BITS_MASK 3
#define BSRR_BIT(gpio_pin, value) BIT((gpio_pin) + (value ? 0 : 16))
return GPIOF_FUNC;
}
-static int stm32_gpio_set_dir_flags(struct udevice *dev, unsigned int offset,
- ulong flags)
+static int stm32_gpio_set_flags(struct udevice *dev, unsigned int offset,
+ ulong flags)
{
struct stm32_gpio_priv *priv = dev_get_priv(dev);
struct stm32_gpio_regs *regs = priv->regs;
return idx;
if (flags & GPIOD_IS_OUT) {
- int value = GPIOD_FLAGS_OUTPUT(flags);
+ bool value = flags & GPIOD_IS_OUT_ACTIVE;
if (flags & GPIOD_OPEN_DRAIN)
stm32_gpio_set_otype(regs, idx, STM32_GPIO_OTYPE_OD);
else
stm32_gpio_set_otype(regs, idx, STM32_GPIO_OTYPE_PP);
+
stm32_gpio_set_moder(regs, idx, STM32_GPIO_MODE_OUT);
writel(BSRR_BIT(idx, value), ®s->bsrr);
} else if (flags & GPIOD_IS_IN) {
stm32_gpio_set_moder(regs, idx, STM32_GPIO_MODE_IN);
- if (flags & GPIOD_PULL_UP)
- stm32_gpio_set_pupd(regs, idx, STM32_GPIO_PUPD_UP);
- else if (flags & GPIOD_PULL_DOWN)
- stm32_gpio_set_pupd(regs, idx, STM32_GPIO_PUPD_DOWN);
}
+ if (flags & GPIOD_PULL_UP)
+ stm32_gpio_set_pupd(regs, idx, STM32_GPIO_PUPD_UP);
+ else if (flags & GPIOD_PULL_DOWN)
+ stm32_gpio_set_pupd(regs, idx, STM32_GPIO_PUPD_DOWN);
return 0;
}
-static int stm32_gpio_get_dir_flags(struct udevice *dev, unsigned int offset,
- ulong *flags)
+static int stm32_gpio_get_flags(struct udevice *dev, unsigned int offset,
+ ulong *flagsp)
{
struct stm32_gpio_priv *priv = dev_get_priv(dev);
struct stm32_gpio_regs *regs = priv->regs;
break;
case STM32_GPIO_MODE_IN:
dir_flags |= GPIOD_IS_IN;
- switch (stm32_gpio_get_pupd(regs, idx)) {
- case STM32_GPIO_PUPD_UP:
- dir_flags |= GPIOD_PULL_UP;
- break;
- case STM32_GPIO_PUPD_DOWN:
- dir_flags |= GPIOD_PULL_DOWN;
- break;
- default:
- break;
- }
break;
default:
break;
}
- *flags = dir_flags;
+ switch (stm32_gpio_get_pupd(regs, idx)) {
+ case STM32_GPIO_PUPD_UP:
+ dir_flags |= GPIOD_PULL_UP;
+ break;
+ case STM32_GPIO_PUPD_DOWN:
+ dir_flags |= GPIOD_PULL_DOWN;
+ break;
+ default:
+ break;
+ }
+ *flagsp = dir_flags;
return 0;
}
.get_value = stm32_gpio_get_value,
.set_value = stm32_gpio_set_value,
.get_function = stm32_gpio_get_function,
- .set_dir_flags = stm32_gpio_set_dir_flags,
- .get_dir_flags = stm32_gpio_get_dir_flags,
+ .set_flags = stm32_gpio_set_flags,
+ .get_flags = stm32_gpio_get_flags,
};
static int gpio_stm32_probe(struct udevice *dev)
dev_err(dev, "failed to enable clock\n");
return ret;
}
- debug("clock enabled for device %s\n", dev->name);
+ dev_dbg(dev, "clock enabled\n");
return 0;
}
.probe = gpio_stm32_probe,
.ops = &gpio_stm32_ops,
.flags = DM_UC_FLAG_SEQ_ALIAS,
- .priv_auto_alloc_size = sizeof(struct stm32_gpio_priv),
+ .priv_auto = sizeof(struct stm32_gpio_priv),
};