#include <asm/arch/imx-regs.h>
#include <asm/gpio.h>
#include <asm/io.h>
+#include <dt-structs.h>
+#include <mapmem.h>
enum mxc_gpio_direction {
MXC_GPIO_DIRECTION_IN,
#define GPIO_PER_BANK 32
struct mxc_gpio_plat {
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+ /* Put this first since driver model will copy the data here */
+ struct dtd_gpio_mxc dtplat;
+#endif
int bank_index;
struct gpio_regs *regs;
};
struct gpio_regs *regs;
};
-#ifndef CONFIG_DM_GPIO
-#define GPIO_TO_PORT(n) (n / 32)
+#if !CONFIG_IS_ENABLED(DM_GPIO)
+#define GPIO_TO_PORT(n) ((n) / 32)
/* GPIO port description */
static unsigned long gpio_ports[] = {
[0] = GPIO1_BASE_ADDR,
[1] = GPIO2_BASE_ADDR,
[2] = GPIO3_BASE_ADDR,
-#if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX51) || \
+#if defined(CONFIG_MX27) || defined(CONFIG_MX51) || \
defined(CONFIG_MX53) || defined(CONFIG_MX6) || \
defined(CONFIG_MX7) || defined(CONFIG_IMX8M) || \
- defined(CONFIG_ARCH_IMX8)
+ defined(CONFIG_ARCH_IMX8) || defined(CONFIG_IMXRT1050)
[3] = GPIO4_BASE_ADDR,
#endif
#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6) || \
defined(CONFIG_MX7) || defined(CONFIG_IMX8M) || \
- defined(CONFIG_ARCH_IMX8)
+ defined(CONFIG_ARCH_IMX8) || defined(CONFIG_IMXRT1050)
[4] = GPIO5_BASE_ADDR,
-#if !(defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) || defined(CONFIG_IMX8M))
+#if !(defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) || \
+ defined(CONFIG_IMX8M) || defined(CONFIG_IMXRT1050))
[5] = GPIO6_BASE_ADDR,
#endif
#endif
}
#endif
-#ifdef CONFIG_DM_GPIO
+#if CONFIG_IS_ENABLED(DM_GPIO)
#include <fdtdec.h>
static int mxc_gpio_is_output(struct gpio_regs *regs, int offset)
{
static int mxc_gpio_probe(struct udevice *dev)
{
struct mxc_bank_info *bank = dev_get_priv(dev);
- struct mxc_gpio_plat *plat = dev_get_platdata(dev);
+ struct mxc_gpio_plat *plat = dev_get_plat(dev);
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
int banknum;
char name[18], *str;
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+ struct dtd_gpio_mxc *dtplat = &plat->dtplat;
+
+ plat->regs = map_sysmem(dtplat->reg[0], dtplat->reg[1]);
+#endif
+
banknum = plat->bank_index;
- sprintf(name, "GPIO%d_", banknum + 1);
+ if (IS_ENABLED(CONFIG_ARCH_IMX8))
+ sprintf(name, "GPIO%d_", banknum);
+ else
+ sprintf(name, "GPIO%d_", banknum + 1);
str = strdup(name);
if (!str)
return -ENOMEM;
return 0;
}
-static int mxc_gpio_bind(struct udevice *dev)
+static int mxc_gpio_of_to_plat(struct udevice *dev)
{
- struct mxc_gpio_plat *plat = dev->platdata;
- fdt_addr_t addr;
-
- /*
- * If platdata already exsits, directly return.
- * Actually only when DT is not supported, platdata
- * is statically initialized in U_BOOT_DEVICES.Here
- * will return.
- */
- if (plat)
- return 0;
-
- addr = devfdt_get_addr(dev);
- if (addr == FDT_ADDR_T_NONE)
- return -EINVAL;
-
- /*
- * TODO:
- * When every board is converted to driver model and DT is supported,
- * this can be done by auto-alloc feature, but not using calloc
- * to alloc memory for platdata.
- *
- * For example mxc_plat below uses platform data rather than device
- * tree.
- *
- * NOTE: DO NOT COPY this code if you are using device tree.
- */
- plat = calloc(1, sizeof(*plat));
- if (!plat)
- return -ENOMEM;
+ struct mxc_gpio_plat *plat = dev_get_plat(dev);
+ if (!CONFIG_IS_ENABLED(OF_PLATDATA)) {
+ fdt_addr_t addr;
+ addr = dev_read_addr(dev);
+ if (addr == FDT_ADDR_T_NONE)
+ return -EINVAL;
+
+ plat->regs = (struct gpio_regs *)addr;
+ }
+ plat->bank_index = dev_seq(dev);
- plat->regs = (struct gpio_regs *)addr;
- plat->bank_index = dev->req_seq;
- dev->platdata = plat;
+ return 0;
+}
+static int mxc_gpio_bind(struct udevice *dev)
+{
return 0;
}
.id = UCLASS_GPIO,
.ops = &gpio_mxc_ops,
.probe = mxc_gpio_probe,
- .priv_auto_alloc_size = sizeof(struct mxc_bank_info),
+ .of_to_plat = mxc_gpio_of_to_plat,
+ .plat_auto = sizeof(struct mxc_gpio_plat),
+ .priv_auto = sizeof(struct mxc_bank_info),
.of_match = mxc_gpio_ids,
.bind = mxc_gpio_bind,
};
+DM_DRIVER_ALIAS(gpio_mxc, fsl_imx6q_gpio)
+
#if !CONFIG_IS_ENABLED(OF_CONTROL)
static const struct mxc_gpio_plat mxc_plat[] = {
{ 0, (struct gpio_regs *)GPIO1_BASE_ADDR },
{ 1, (struct gpio_regs *)GPIO2_BASE_ADDR },
{ 2, (struct gpio_regs *)GPIO3_BASE_ADDR },
-#if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX51) || \
+#if defined(CONFIG_MX27) || defined(CONFIG_MX51) || \
defined(CONFIG_MX53) || defined(CONFIG_MX6) || \
defined(CONFIG_IMX8M) || defined(CONFIG_ARCH_IMX8)
{ 3, (struct gpio_regs *)GPIO4_BASE_ADDR },
#endif
};
-U_BOOT_DEVICES(mxc_gpios) = {
+U_BOOT_DRVINFOS(mxc_gpios) = {
{ "gpio_mxc", &mxc_plat[0] },
{ "gpio_mxc", &mxc_plat[1] },
{ "gpio_mxc", &mxc_plat[2] },
-#if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX51) || \
+#if defined(CONFIG_MX27) || defined(CONFIG_MX51) || \
defined(CONFIG_MX53) || defined(CONFIG_MX6) || \
defined(CONFIG_IMX8M) || defined(CONFIG_ARCH_IMX8)
{ "gpio_mxc", &mxc_plat[3] },