+// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2016
- * Mario Six, Guntermann & Drunck GmbH, six@gdsys.de
+ * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
*
* based on arch/powerpc/include/asm/mpc85xx_gpio.h, which is
*
* Copyright 2010 eXMeritus, A Boeing Company
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <dm.h>
-#include <asm/gpio.h>
#include <mapmem.h>
-
-DECLARE_GLOBAL_DATA_PTR;
+#include <asm/gpio.h>
struct ccsr_gpio {
u32 gpdir;
* for output pins
*/
u32 dat_shadow;
+ ulong type;
+};
+
+enum {
+ MPC8XXX_GPIO_TYPE,
+ MPC5121_GPIO_TYPE,
};
inline u32 gpio_mask(uint gpio)
return in_be32(&base->gpdir) & mask;
}
-static inline void mpc8xxx_gpio_set_in(struct ccsr_gpio *base, u32 gpios)
-{
- clrbits_be32(&base->gpdat, gpios);
- /* GPDIR register 0 -> input */
- clrbits_be32(&base->gpdir, gpios);
-}
-
static inline void mpc8xxx_gpio_set_low(struct ccsr_gpio *base, u32 gpios)
{
clrbits_be32(&base->gpdat, gpios);
static int mpc8xxx_gpio_direction_input(struct udevice *dev, uint gpio)
{
struct mpc8xxx_gpio_data *data = dev_get_priv(dev);
+ u32 mask = gpio_mask(gpio);
+
+ /* GPDIR register 0 -> input */
+ clrbits_be32(&data->base->gpdir, mask);
- mpc8xxx_gpio_set_in(data->base, gpio_mask(gpio));
return 0;
}
static int mpc8xxx_gpio_direction_output(struct udevice *dev, uint gpio,
int value)
{
+ struct mpc8xxx_gpio_data *data = dev_get_priv(dev);
+
+ /* GPIO 28..31 are input only on MPC5121 */
+ if (data->type == MPC5121_GPIO_TYPE && gpio >= 28)
+ return -EINVAL;
+
return mpc8xxx_gpio_set_value(dev, gpio, value);
}
{
struct mpc8xxx_gpio_plat *plat = dev_get_platdata(dev);
fdt_addr_t addr;
- fdt_size_t size;
+ u32 reg[2];
+
+ dev_read_u32_array(dev, "reg", reg, 2);
+ addr = dev_translate_address(dev, reg);
- addr = fdtdec_get_addr_size_auto_noparent(gd->fdt_blob,
- dev_of_offset(dev),
- "reg", 0, &size, false);
plat->addr = addr;
- plat->size = size;
- plat->ngpios = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
- "ngpios", 32);
+ plat->size = reg[1];
+ plat->ngpios = dev_read_u32_default(dev, "ngpios", 32);
return 0;
}
struct mpc8xxx_gpio_data *priv = dev_get_priv(dev);
struct mpc8xxx_gpio_plat *plat = dev_get_platdata(dev);
unsigned long size = plat->size;
+ ulong driver_data = dev_get_driver_data(dev);
if (size == 0)
size = 0x100;
priv->addr = plat->addr;
- priv->base = map_sysmem(CONFIG_SYS_IMMR + plat->addr, size);
+ priv->base = map_sysmem(plat->addr, size);
if (!priv->base)
return -ENOMEM;
};
static const struct udevice_id mpc8xxx_gpio_ids[] = {
- { .compatible = "fsl,pq3-gpio" },
+ { .compatible = "fsl,pq3-gpio", .data = MPC8XXX_GPIO_TYPE },
+ { .compatible = "fsl,mpc8308-gpio", .data = MPC8XXX_GPIO_TYPE },
+ { .compatible = "fsl,mpc8349-gpio", .data = MPC8XXX_GPIO_TYPE },
+ { .compatible = "fsl,mpc8572-gpio", .data = MPC8XXX_GPIO_TYPE},
+ { .compatible = "fsl,mpc8610-gpio", .data = MPC8XXX_GPIO_TYPE},
+ { .compatible = "fsl,mpc5121-gpio", .data = MPC5121_GPIO_TYPE, },
+ { .compatible = "fsl,qoriq-gpio", .data = MPC8XXX_GPIO_TYPE },
{ /* sentinel */ }
};