initramfs: break loop when decompression finishes

[platform/kernel/linux-rpi.git] / drivers / gpio / gpio-aspeed-sgpio.c

diff --git a/drivers/gpio/gpio-aspeed-sgpio.c b/drivers/gpio/gpio-aspeed-sgpio.c
index b3a9b84..72755fe 100644 (file)
--- a/drivers/gpio/gpio-aspeed-sgpio.c
+++ b/drivers/gpio/gpio-aspeed-sgpio.c
@@ -14,6 +14,7 @@
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/platform_device.h>
+#include <linux/seq_file.h>
 #include <linux/spinlock.h>
 #include <linux/string.h>
 
@@ -29,9 +30,9 @@ struct aspeed_sgpio_pdata {
 
 struct aspeed_sgpio {
        struct gpio_chip chip;
-       struct irq_chip intc;
+       struct device *dev;
        struct clk *pclk;
-       spinlock_t lock;
+       raw_spinlock_t lock;
        void __iomem *base;
        int irq;
 };
@@ -173,12 +174,12 @@ static int aspeed_sgpio_get(struct gpio_chip *gc, unsigned int offset)
        enum aspeed_sgpio_reg reg;
        int rc = 0;
 
-       spin_lock_irqsave(&gpio->lock, flags);
+       raw_spin_lock_irqsave(&gpio->lock, flags);
 
        reg = aspeed_sgpio_is_input(offset) ? reg_val : reg_rdata;
        rc = !!(ioread32(bank_reg(gpio, bank, reg)) & GPIO_BIT(offset));
 
-       spin_unlock_irqrestore(&gpio->lock, flags);
+       raw_spin_unlock_irqrestore(&gpio->lock, flags);
 
        return rc;
 }
@@ -215,11 +216,11 @@ static void aspeed_sgpio_set(struct gpio_chip *gc, unsigned int offset, int val)
        struct aspeed_sgpio *gpio = gpiochip_get_data(gc);
        unsigned long flags;
 
-       spin_lock_irqsave(&gpio->lock, flags);
+       raw_spin_lock_irqsave(&gpio->lock, flags);
 
        sgpio_set_value(gc, offset, val);
 
-       spin_unlock_irqrestore(&gpio->lock, flags);
+       raw_spin_unlock_irqrestore(&gpio->lock, flags);
 }
 
 static int aspeed_sgpio_dir_in(struct gpio_chip *gc, unsigned int offset)
@@ -236,9 +237,9 @@ static int aspeed_sgpio_dir_out(struct gpio_chip *gc, unsigned int offset, int v
        /* No special action is required for setting the direction; we'll
         * error-out in sgpio_set_value if this isn't an output GPIO */
 
-       spin_lock_irqsave(&gpio->lock, flags);
+       raw_spin_lock_irqsave(&gpio->lock, flags);
        rc = sgpio_set_value(gc, offset, val);
-       spin_unlock_irqrestore(&gpio->lock, flags);
+       raw_spin_unlock_irqrestore(&gpio->lock, flags);
 
        return rc;
 }
@@ -277,11 +278,11 @@ static void aspeed_sgpio_irq_ack(struct irq_data *d)
 
        status_addr = bank_reg(gpio, bank, reg_irq_status);
 
-       spin_lock_irqsave(&gpio->lock, flags);
+       raw_spin_lock_irqsave(&gpio->lock, flags);
 
        iowrite32(bit, status_addr);
 
-       spin_unlock_irqrestore(&gpio->lock, flags);
+       raw_spin_unlock_irqrestore(&gpio->lock, flags);
 }
 
 static void aspeed_sgpio_irq_set_mask(struct irq_data *d, bool set)
@@ -296,7 +297,11 @@ static void aspeed_sgpio_irq_set_mask(struct irq_data *d, bool set)
        irqd_to_aspeed_sgpio_data(d, &gpio, &bank, &bit, &offset);
        addr = bank_reg(gpio, bank, reg_irq_enable);
 
-       spin_lock_irqsave(&gpio->lock, flags);
+       /* Unmasking the IRQ */
+       if (set)
+               gpiochip_enable_irq(&gpio->chip, irqd_to_hwirq(d));
+
+       raw_spin_lock_irqsave(&gpio->lock, flags);
 
        reg = ioread32(addr);
        if (set)
@@ -306,7 +311,13 @@ static void aspeed_sgpio_irq_set_mask(struct irq_data *d, bool set)
 
        iowrite32(reg, addr);
 
-       spin_unlock_irqrestore(&gpio->lock, flags);
+       raw_spin_unlock_irqrestore(&gpio->lock, flags);
+
+       /* Masking the IRQ */
+       if (!set)
+               gpiochip_disable_irq(&gpio->chip, irqd_to_hwirq(d));
+
+
 }
 
 static void aspeed_sgpio_irq_mask(struct irq_data *d)
@@ -355,7 +366,7 @@ static int aspeed_sgpio_set_type(struct irq_data *d, unsigned int type)
                return -EINVAL;
        }
 
-       spin_lock_irqsave(&gpio->lock, flags);
+       raw_spin_lock_irqsave(&gpio->lock, flags);
 
        addr = bank_reg(gpio, bank, reg_irq_type0);
        reg = ioread32(addr);
@@ -372,7 +383,7 @@ static int aspeed_sgpio_set_type(struct irq_data *d, unsigned int type)
        reg = (reg & ~bit) | type2;
        iowrite32(reg, addr);
 
-       spin_unlock_irqrestore(&gpio->lock, flags);
+       raw_spin_unlock_irqrestore(&gpio->lock, flags);
 
        irq_set_handler_locked(d, handler);
 
@@ -401,6 +412,27 @@ static void aspeed_sgpio_irq_handler(struct irq_desc *desc)
        chained_irq_exit(ic, desc);
 }
 
+static void aspeed_sgpio_irq_print_chip(struct irq_data *d, struct seq_file *p)
+{
+       const struct aspeed_sgpio_bank *bank;
+       struct aspeed_sgpio *gpio;
+       u32 bit;
+       int offset;
+
+       irqd_to_aspeed_sgpio_data(d, &gpio, &bank, &bit, &offset);
+       seq_printf(p, dev_name(gpio->dev));
+}
+
+static const struct irq_chip aspeed_sgpio_irq_chip = {
+       .irq_ack = aspeed_sgpio_irq_ack,
+       .irq_mask = aspeed_sgpio_irq_mask,
+       .irq_unmask = aspeed_sgpio_irq_unmask,
+       .irq_set_type = aspeed_sgpio_set_type,
+       .irq_print_chip = aspeed_sgpio_irq_print_chip,
+       .flags = IRQCHIP_IMMUTABLE,
+       GPIOCHIP_IRQ_RESOURCE_HELPERS,
+};
+
 static int aspeed_sgpio_setup_irqs(struct aspeed_sgpio *gpio,
                                   struct platform_device *pdev)
 {
@@ -423,14 +455,8 @@ static int aspeed_sgpio_setup_irqs(struct aspeed_sgpio *gpio,
                iowrite32(0xffffffff, bank_reg(gpio, bank, reg_irq_status));
        }
 
-       gpio->intc.name = dev_name(&pdev->dev);
-       gpio->intc.irq_ack = aspeed_sgpio_irq_ack;
-       gpio->intc.irq_mask = aspeed_sgpio_irq_mask;
-       gpio->intc.irq_unmask = aspeed_sgpio_irq_unmask;
-       gpio->intc.irq_set_type = aspeed_sgpio_set_type;
-
        irq = &gpio->chip.irq;
-       irq->chip = &gpio->intc;
+       gpio_irq_chip_set_chip(irq, &aspeed_sgpio_irq_chip);
        irq->init_valid_mask = aspeed_sgpio_irq_init_valid_mask;
        irq->handler = handle_bad_irq;
        irq->default_type = IRQ_TYPE_NONE;
@@ -467,7 +493,7 @@ static int aspeed_sgpio_reset_tolerance(struct gpio_chip *chip,
 
        reg = bank_reg(gpio, to_bank(offset), reg_tolerance);
 
-       spin_lock_irqsave(&gpio->lock, flags);
+       raw_spin_lock_irqsave(&gpio->lock, flags);
 
        val = readl(reg);
 
@@ -478,7 +504,7 @@ static int aspeed_sgpio_reset_tolerance(struct gpio_chip *chip,
 
        writel(val, reg);
 
-       spin_unlock_irqrestore(&gpio->lock, flags);
+       raw_spin_unlock_irqrestore(&gpio->lock, flags);
 
        return 0;
 }
@@ -524,6 +550,8 @@ static int __init aspeed_sgpio_probe(struct platform_device *pdev)
        if (IS_ERR(gpio->base))
                return PTR_ERR(gpio->base);
 
+       gpio->dev = &pdev->dev;
+
        pdata = device_get_match_data(&pdev->dev);
        if (!pdata)
                return -EINVAL;
@@ -575,7 +603,7 @@ static int __init aspeed_sgpio_probe(struct platform_device *pdev)
        iowrite32(FIELD_PREP(ASPEED_SGPIO_CLK_DIV_MASK, sgpio_clk_div) | gpio_cnt_regval |
                  ASPEED_SGPIO_ENABLE, gpio->base + ASPEED_SGPIO_CTRL);
 
-       spin_lock_init(&gpio->lock);
+       raw_spin_lock_init(&gpio->lock);
 
        gpio->chip.parent = &pdev->dev;
        gpio->chip.ngpio = nr_gpios * 2;
@@ -609,4 +637,3 @@ static struct platform_driver aspeed_sgpio_driver = {
 
 module_platform_driver_probe(aspeed_sgpio_driver, aspeed_sgpio_probe);
 MODULE_DESCRIPTION("Aspeed Serial GPIO Driver");
-MODULE_LICENSE("GPL");