dm: treewide: Rename auto_alloc_size members to be shorter

[platform/kernel/u-boot.git] / drivers / gpio / atmel_pio4.c

diff --git a/drivers/gpio/atmel_pio4.c b/drivers/gpio/atmel_pio4.c
index f368946..d92c061 100644 (file)
--- a/drivers/gpio/atmel_pio4.c
+++ b/drivers/gpio/atmel_pio4.c
@@ -1,17 +1,18 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Atmel PIO4 device driver
  *
  * Copyright (C) 2015 Atmel Corporation
  *              Wenyou.Yang <wenyou.yang@atmel.com>
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 #include <common.h>
 #include <clk.h>
 #include <dm.h>
 #include <fdtdec.h>
+#include <malloc.h>
 #include <asm/arch/hardware.h>
 #include <asm/gpio.h>
+#include <linux/bitops.h>
 #include <mach/gpio.h>
 #include <mach/atmel_pio4.h>
 
@@ -44,21 +45,21 @@ static struct atmel_pio4_port *atmel_pio4_port_base(u32 port)
 }
 
 static int atmel_pio4_config_io_func(u32 port, u32 pin,
-                                    u32 func, u32 use_pullup)
+                                    u32 func, u32 config)
 {
        struct atmel_pio4_port *port_base;
        u32 reg, mask;
 
        if (pin >= ATMEL_PIO_NPINS_PER_BANK)
-               return -ENODEV;
+               return -EINVAL;
 
        port_base = atmel_pio4_port_base(port);
        if (!port_base)
-               return -ENODEV;
+               return -EINVAL;
 
        mask = 1 << pin;
        reg = func;
-       reg |= use_pullup ? ATMEL_PIO_PUEN_MASK : 0;
+       reg |= config;
 
        writel(mask, &port_base->mskr);
        writel(reg, &port_base->cfgr);
@@ -66,60 +67,60 @@ static int atmel_pio4_config_io_func(u32 port, u32 pin,
        return 0;
 }
 
-int atmel_pio4_set_gpio(u32 port, u32 pin, u32 use_pullup)
+int atmel_pio4_set_gpio(u32 port, u32 pin, u32 config)
 {
        return atmel_pio4_config_io_func(port, pin,
                                         ATMEL_PIO_CFGR_FUNC_GPIO,
-                                        use_pullup);
+                                        config);
 }
 
-int atmel_pio4_set_a_periph(u32 port, u32 pin, u32 use_pullup)
+int atmel_pio4_set_a_periph(u32 port, u32 pin, u32 config)
 {
        return atmel_pio4_config_io_func(port, pin,
                                         ATMEL_PIO_CFGR_FUNC_PERIPH_A,
-                                        use_pullup);
+                                        config);
 }
 
-int atmel_pio4_set_b_periph(u32 port, u32 pin, u32 use_pullup)
+int atmel_pio4_set_b_periph(u32 port, u32 pin, u32 config)
 {
        return atmel_pio4_config_io_func(port, pin,
                                         ATMEL_PIO_CFGR_FUNC_PERIPH_B,
-                                        use_pullup);
+                                        config);
 }
 
-int atmel_pio4_set_c_periph(u32 port, u32 pin, u32 use_pullup)
+int atmel_pio4_set_c_periph(u32 port, u32 pin, u32 config)
 {
        return atmel_pio4_config_io_func(port, pin,
                                         ATMEL_PIO_CFGR_FUNC_PERIPH_C,
-                                        use_pullup);
+                                        config);
 }
 
-int atmel_pio4_set_d_periph(u32 port, u32 pin, u32 use_pullup)
+int atmel_pio4_set_d_periph(u32 port, u32 pin, u32 config)
 {
        return atmel_pio4_config_io_func(port, pin,
                                         ATMEL_PIO_CFGR_FUNC_PERIPH_D,
-                                        use_pullup);
+                                        config);
 }
 
-int atmel_pio4_set_e_periph(u32 port, u32 pin, u32 use_pullup)
+int atmel_pio4_set_e_periph(u32 port, u32 pin, u32 config)
 {
        return atmel_pio4_config_io_func(port, pin,
                                         ATMEL_PIO_CFGR_FUNC_PERIPH_E,
-                                        use_pullup);
+                                        config);
 }
 
-int atmel_pio4_set_f_periph(u32 port, u32 pin, u32 use_pullup)
+int atmel_pio4_set_f_periph(u32 port, u32 pin, u32 config)
 {
        return atmel_pio4_config_io_func(port, pin,
                                         ATMEL_PIO_CFGR_FUNC_PERIPH_F,
-                                        use_pullup);
+                                        config);
 }
 
-int atmel_pio4_set_g_periph(u32 port, u32 pin, u32 use_pullup)
+int atmel_pio4_set_g_periph(u32 port, u32 pin, u32 config)
 {
        return atmel_pio4_config_io_func(port, pin,
                                         ATMEL_PIO_CFGR_FUNC_PERIPH_G,
-                                        use_pullup);
+                                        config);
 }
 
 int atmel_pio4_set_pio_output(u32 port, u32 pin, u32 value)
@@ -128,11 +129,11 @@ int atmel_pio4_set_pio_output(u32 port, u32 pin, u32 value)
        u32 reg, mask;
 
        if (pin >= ATMEL_PIO_NPINS_PER_BANK)
-               return -ENODEV;
+               return -EINVAL;
 
        port_base = atmel_pio4_port_base(port);
        if (!port_base)
-               return -ENODEV;
+               return -EINVAL;
 
        mask = 0x01 << pin;
        reg = ATMEL_PIO_CFGR_FUNC_GPIO | ATMEL_PIO_DIR_MASK;
@@ -154,11 +155,11 @@ int atmel_pio4_get_pio_input(u32 port, u32 pin)
        u32 reg, mask;
 
        if (pin >= ATMEL_PIO_NPINS_PER_BANK)
-               return -ENODEV;
+               return -EINVAL;
 
        port_base = atmel_pio4_port_base(port);
        if (!port_base)
-               return -ENODEV;
+               return -EINVAL;
 
        mask = 0x01 << pin;
        reg = ATMEL_PIO_CFGR_FUNC_GPIO;
@@ -169,7 +170,7 @@ int atmel_pio4_get_pio_input(u32 port, u32 pin)
        return (readl(&port_base->pdsr) & mask) ? 1 : 0;
 }
 
-#ifdef CONFIG_DM_GPIO
+#if CONFIG_IS_ENABLED(DM_GPIO)
 
 struct atmel_pioctrl_data {
        u32 nbanks;
@@ -298,7 +299,7 @@ static int atmel_pio4_probe(struct udevice *dev)
 
        clk_free(&clk);
 
-       addr_base = devfdt_get_addr(dev);
+       addr_base = dev_read_addr(dev);
        if (addr_base == FDT_ADDR_T_NONE)
                return -EINVAL;
 
@@ -337,7 +338,7 @@ U_BOOT_DRIVER(gpio_atmel_pio4) = {
        .probe  = atmel_pio4_probe,
        .bind   = atmel_pio4_bind,
        .of_match = atmel_pio4_ids,
-       .platdata_auto_alloc_size = sizeof(struct atmel_pio4_platdata),
+       .platdata_auto  = sizeof(struct atmel_pio4_platdata),
 };
 
 #endif