suitable malloc() implementation. If you are not using the
full malloc() enabled by CONFIG_SYS_SPL_MALLOC_START,
consider using CONFIG_SYS_MALLOC_SIMPLE. In that case you
- must provide CONFIG_SYS_MALLOC_F_LEN to set the size.
+ must provide CONFIG_SPL_SYS_MALLOC_F_LEN to set the size.
In most cases driver model will only allocate a few uclasses
and devices in SPL, so 1KB should be enable. See
- CONFIG_SYS_MALLOC_F_LEN for more details on how to enable it.
+ CONFIG_SPL_SYS_MALLOC_F_LEN for more details on how to enable it.
+
+config TPL_DM
+ bool "Enable Driver Model for TPL"
+ depends on DM && TPL
+ help
+ Enable driver model in TPL. You will need to provide a
+ suitable malloc() implementation. If you are not using the
+ full malloc() enabled by CONFIG_SYS_SPL_MALLOC_START,
+ consider using CONFIG_SYS_MALLOC_SIMPLE. In that case you
+ must provide CONFIG_SPL_SYS_MALLOC_F_LEN to set the size.
+ In most cases driver model will only allocate a few uclasses
+ and devices in SPL, so 1KB should be enough. See
+ CONFIG_SPL_SYS_MALLOC_F_LEN for more details on how to enable it.
+ Disable this for very small implementations.
config DM_WARN
bool "Enable warnings in driver model"
help
Most boards will have a '/aliases' node containing the path to
numbered devices (e.g. serial0 = &serial0). This feature can be
+ disabled if it is not required.
+
+config SPL_DM_SEQ_ALIAS
+ bool "Support numbered aliases in device tree in SPL"
+ depends on DM
+ default n
+ help
+ Most boards will have a '/aliases' node containing the path to
+ numbered devices (e.g. serial0 = &serial0). This feature can be
disabled if it is not required, to save code space in SPL.
config REGMAP
support any bus type (I2C, SPI) but so far this only supports
direct memory access.
+config SPL_REGMAP
+ bool "Support register maps in SPL"
+ depends on DM
+ help
+ Hardware peripherals tend to have one or more sets of registers
+ which can be accessed to control the hardware. A register map
+ models this with a simple read/write interface. It can in principle
+ support any bus type (I2C, SPI) but so far this only supports
+ direct memory access.
+
config SYSCON
bool "Support system controllers"
depends on REGMAP
by this uclass, including accessing registers via regmap and
assigning a unique number to each.
+config SPL_SYSCON
+ bool "Support system controllers in SPL"
+ depends on REGMAP
+ help
+ Many SoCs have a number of system controllers which are dealt with
+ as a group by a single driver. Some common functionality is provided
+ by this uclass, including accessing registers via regmap and
+ assigning a unique number to each.
+
config DEVRES
bool "Managed device resources"
depends on DM
config SPL_SIMPLE_BUS
bool "Support simple-bus driver in SPL"
depends on SPL_DM && SPL_OF_CONTROL
- default n
+ default y
help
Supports the 'simple-bus' driver, which is used on some systems
in SPL.
+config OF_TRANSLATE
+ bool "Translate addresses using fdt_translate_address"
+ depends on DM && OF_CONTROL
+ default y
+ help
+ If this option is enabled, the reg property will be translated
+ using the fdt_translate_address() function. This is necessary
+ on some platforms (e.g. MVEBU) using complex "ranges"
+ properties in many nodes. As this translation is not handled
+ correctly in the default simple_bus_translate() function.
+
+ If this option is not enabled, simple_bus_translate() will be
+ used for the address translation. This function is faster and
+ smaller in size than fdt_translate_address().
+
+config SPL_OF_TRANSLATE
+ bool "Translate addresses using fdt_translate_address in SPL"
+ depends on SPL_DM && SPL_OF_CONTROL
+ default n
+ help
+ If this option is enabled, the reg property will be translated
+ using the fdt_translate_address() function. This is necessary
+ on some platforms (e.g. MVEBU) using complex "ranges"
+ properties in many nodes. As this translation is not handled
+ correctly in the default simple_bus_translate() function.
+
+ If this option is not enabled, simple_bus_translate() will be
+ used for the address translation. This function is faster and
+ smaller in size than fdt_translate_address().
+
+config OF_ISA_BUS
+ bool
+ depends on OF_TRANSLATE
+ help
+ Is this option is enabled then support for the ISA bus will
+ be included for addresses read from DT. This is something that
+ should be known to be required or not based upon the board
+ being targetted, and whether or not it makes use of an ISA bus.
+
+ The bus is matched based upon its node name equalling "isa". The
+ busses #address-cells should equal 2, with the first cell being
+ used to hold flags & flag 0x1 indicating that the address range
+ should be accessed using I/O port in/out accessors. The second
+ cell holds the offset into ISA bus address space. The #size-cells
+ property should equal 1, and of course holds the size of the
+ address range used by a device.
+
+ If this option is not enabled then support for the ISA bus is
+ not included and any such busses used in DT will be treated as
+ typical simple-bus compatible busses. This will lead to
+ mistranslation of device addresses, so ensure that this is
+ enabled if your board does include an ISA bus.
+
+config DM_DEV_READ_INLINE
+ bool
+ default y if !OF_LIVE
+
endmenu