Merge branch 'rwonce/rework' of git://git.kernel.org/pub/scm/linux/kernel/git/will...

[platform/kernel/linux-rpi.git] / drivers / clk / ingenic / cgu.h

diff --git a/drivers/clk/ingenic/cgu.h b/drivers/clk/ingenic/cgu.h
index 0dc8004..2c75ef4 100644 (file)
--- a/drivers/clk/ingenic/cgu.h
+++ b/drivers/clk/ingenic/cgu.h
@@ -17,6 +17,7 @@
 /**
  * struct ingenic_cgu_pll_info - information about a PLL
  * @reg: the offset of the PLL's control register within the CGU
+ * @rate_multiplier: the multiplier needed by pll rate calculation
  * @m_shift: the number of bits to shift the multiplier value by (ie. the
  *           index of the lowest bit of the multiplier value in the PLL's
  *           control register)
@@ -37,6 +38,7 @@
  * @od_encoding: a pointer to an array mapping post-VCO divider values to
  *               their encoded values in the PLL control register, or -1 for
  *               unsupported values
+ * @bypass_reg: the offset of the bypass control register within the CGU
  * @bypass_bit: the index of the bypass bit in the PLL control register
  * @enable_bit: the index of the enable bit in the PLL control register
  * @stable_bit: the index of the stable bit in the PLL control register
@@ -44,10 +46,12 @@
  */
 struct ingenic_cgu_pll_info {
        unsigned reg;
+       unsigned rate_multiplier;
        const s8 *od_encoding;
        u8 m_shift, m_bits, m_offset;
        u8 n_shift, n_bits, n_offset;
        u8 od_shift, od_bits, od_max;
+       unsigned bypass_reg;
        u8 bypass_bit;
        u8 enable_bit;
        u8 stable_bit;