Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u...

[platform/kernel/u-boot.git] / drivers / clk / clk_zynq.c

diff --git a/drivers/clk/clk_zynq.c b/drivers/clk/clk_zynq.c
index a699a36..18915c3 100644 (file)
--- a/drivers/clk/clk_zynq.c
+++ b/drivers/clk/clk_zynq.c
@@ -11,6 +11,7 @@
 #include <clk-uclass.h>
 #include <dm.h>
 #include <log.h>
+#include <asm/global_data.h>
 #include <dm/device_compat.h>
 #include <dm/lists.h>
 #include <errno.h>
@@ -444,11 +445,21 @@ static ulong zynq_clk_get_rate(struct clk *clk)
 }
 #endif
 
+static int dummy_enable(struct clk *clk)
+{
+       /*
+        * Add implementation but by default all clocks are enabled
+        * after power up which is only one supported case now.
+        */
+       return 0;
+}
+
 static struct clk_ops zynq_clk_ops = {
        .get_rate = zynq_clk_get_rate,
 #ifndef CONFIG_SPL_BUILD
        .set_rate = zynq_clk_set_rate,
 #endif
+       .enable = dummy_enable,
 };
 
 static int zynq_clk_probe(struct udevice *dev)
@@ -485,6 +496,6 @@ U_BOOT_DRIVER(zynq_clk) = {
        .id             = UCLASS_CLK,
        .of_match       = zynq_clk_ids,
        .ops            = &zynq_clk_ops,
-       .priv_auto_alloc_size = sizeof(struct zynq_clk_priv),
+       .priv_auto      = sizeof(struct zynq_clk_priv),
        .probe          = zynq_clk_probe,
 };