\# Source code to NASM documentation
\#
\M{category}{Programming}
-\M{title}{NASM: The Netwide Assembler}
+\M{title}{NASM - The Netwide Assembler}
\M{year}{2002}
\M{author}{The NASM Development Team}
\M{license}{All rights reserved. This document is redistributable under the licence given in the file "COPYING" distributed in the NASM archive.}
\b size override is supported within brackets. In TASM compatible mode,
a size override inside square brackets changes the size of the operand,
-and not the address type of the operand as it does in NASM syntax. E.g.
-\c{mov eax,[DWORD val]} is valid syntax in TASM compatibility mode.
+and not the address type of the operand as it does in NASM syntax. E.g.
+\c{mov eax,[DWORD val]} is valid syntax in TASM compatibility mode.
Note that you lose the ability to override the default address type for
the instruction.
The \c{%arg} directive is used to simplify the handling of
parameters passed on the stack. Stack based parameter passing
-is used by many high level languages, including C, C++ and Pascal.
+is used by many high level languages, including C, C++ and Pascal.
While NASM comes with macros which attempt to duplicate this
functionality (see \k{16cmacro}), the syntax is not particularly
\S{stacksize} \i\c{%stacksize} Directive
The \c{%stacksize} directive is used in conjunction with the
-\c{%arg} (see \k{arg}) and the \c{%local} (see \k{local}) directives.
+\c{%arg} (see \k{arg}) and the \c{%local} (see \k{local}) directives.
It tells NASM the default size to use for subsequent \c{%arg} and
\c{%local} directives. The \c{%stacksize} directive takes one
required argument which is one of \c{flat}, \c{large} or \c{small}.
\c IMUL reg16,r/m16 ; o16 0F AF /r [386]
\c IMUL reg32,r/m32 ; o32 0F AF /r [386]
-\c IMUL reg16,imm8 ; o16 6B /r ib [286]
-\c IMUL reg16,imm16 ; o16 69 /r iw [286]
+\c IMUL reg16,imm8 ; o16 6B /r ib [186]
+\c IMUL reg16,imm16 ; o16 69 /r iw [186]
\c IMUL reg32,imm8 ; o32 6B /r ib [386]
\c IMUL reg32,imm32 ; o32 69 /r id [386]
-\c IMUL reg16,r/m16,imm8 ; o16 6B /r ib [286]
-\c IMUL reg16,r/m16,imm16 ; o16 69 /r iw [286]
+\c IMUL reg16,r/m16,imm8 ; o16 6B /r ib [186]
+\c IMUL reg16,r/m16,imm16 ; o16 69 /r iw [186]
\c IMUL reg32,r/m32,imm8 ; o32 6B /r ib [386]
\c IMUL reg32,r/m32,imm32 ; o32 69 /r id [386]
\c PUSH FS ; 0F A0 [386]
\c PUSH GS ; 0F A8 [386]
-\c PUSH imm8 ; 6A ib [286]
-\c PUSH imm16 ; o16 68 iw [286]
+\c PUSH imm8 ; 6A ib [186]
+\c PUSH imm16 ; o16 68 iw [186]
\c PUSH imm32 ; o32 68 id [386]
\c{PUSH} decrements the stack pointer (\c{SP} or \c{ESP}) by 2 or 4,
\c RCL r/m8,1 ; D0 /2 [8086]
\c RCL r/m8,CL ; D2 /2 [8086]
-\c RCL r/m8,imm8 ; C0 /2 ib [286]
+\c RCL r/m8,imm8 ; C0 /2 ib [186]
\c RCL r/m16,1 ; o16 D1 /2 [8086]
\c RCL r/m16,CL ; o16 D3 /2 [8086]
-\c RCL r/m16,imm8 ; o16 C1 /2 ib [286]
+\c RCL r/m16,imm8 ; o16 C1 /2 ib [186]
\c RCL r/m32,1 ; o32 D1 /2 [386]
\c RCL r/m32,CL ; o32 D3 /2 [386]
\c RCL r/m32,imm8 ; o32 C1 /2 ib [386]
\c RCR r/m8,1 ; D0 /3 [8086]
\c RCR r/m8,CL ; D2 /3 [8086]
-\c RCR r/m8,imm8 ; C0 /3 ib [286]
+\c RCR r/m8,imm8 ; C0 /3 ib [186]
\c RCR r/m16,1 ; o16 D1 /3 [8086]
\c RCR r/m16,CL ; o16 D3 /3 [8086]
-\c RCR r/m16,imm8 ; o16 C1 /3 ib [286]
+\c RCR r/m16,imm8 ; o16 C1 /3 ib [186]
\c RCR r/m32,1 ; o32 D1 /3 [386]
\c RCR r/m32,CL ; o32 D3 /3 [386]
\c RCR r/m32,imm8 ; o32 C1 /3 ib [386]
\c ROL r/m8,1 ; D0 /0 [8086]
\c ROL r/m8,CL ; D2 /0 [8086]
-\c ROL r/m8,imm8 ; C0 /0 ib [286]
+\c ROL r/m8,imm8 ; C0 /0 ib [186]
\c ROL r/m16,1 ; o16 D1 /0 [8086]
\c ROL r/m16,CL ; o16 D3 /0 [8086]
-\c ROL r/m16,imm8 ; o16 C1 /0 ib [286]
+\c ROL r/m16,imm8 ; o16 C1 /0 ib [186]
\c ROL r/m32,1 ; o32 D1 /0 [386]
\c ROL r/m32,CL ; o32 D3 /0 [386]
\c ROL r/m32,imm8 ; o32 C1 /0 ib [386]
\c ROR r/m8,1 ; D0 /1 [8086]
\c ROR r/m8,CL ; D2 /1 [8086]
-\c ROR r/m8,imm8 ; C0 /1 ib [286]
+\c ROR r/m8,imm8 ; C0 /1 ib [186]
\c ROR r/m16,1 ; o16 D1 /1 [8086]
\c ROR r/m16,CL ; o16 D3 /1 [8086]
-\c ROR r/m16,imm8 ; o16 C1 /1 ib [286]
+\c ROR r/m16,imm8 ; o16 C1 /1 ib [186]
\c ROR r/m32,1 ; o32 D1 /1 [386]
\c ROR r/m32,CL ; o32 D3 /1 [386]
\c ROR r/m32,imm8 ; o32 C1 /1 ib [386]
\c SAL r/m8,1 ; D0 /4 [8086]
\c SAL r/m8,CL ; D2 /4 [8086]
-\c SAL r/m8,imm8 ; C0 /4 ib [286]
+\c SAL r/m8,imm8 ; C0 /4 ib [186]
\c SAL r/m16,1 ; o16 D1 /4 [8086]
\c SAL r/m16,CL ; o16 D3 /4 [8086]
-\c SAL r/m16,imm8 ; o16 C1 /4 ib [286]
+\c SAL r/m16,imm8 ; o16 C1 /4 ib [186]
\c SAL r/m32,1 ; o32 D1 /4 [386]
\c SAL r/m32,CL ; o32 D3 /4 [386]
\c SAL r/m32,imm8 ; o32 C1 /4 ib [386]
\c SAR r/m8,1 ; D0 /7 [8086]
\c SAR r/m8,CL ; D2 /7 [8086]
-\c SAR r/m8,imm8 ; C0 /7 ib [286]
+\c SAR r/m8,imm8 ; C0 /7 ib [186]
\c SAR r/m16,1 ; o16 D1 /7 [8086]
\c SAR r/m16,CL ; o16 D3 /7 [8086]
-\c SAR r/m16,imm8 ; o16 C1 /7 ib [286]
+\c SAR r/m16,imm8 ; o16 C1 /7 ib [186]
\c SAR r/m32,1 ; o32 D1 /7 [386]
\c SAR r/m32,CL ; o32 D3 /7 [386]
\c SAR r/m32,imm8 ; o32 C1 /7 ib [386]
\c SHL r/m8,1 ; D0 /4 [8086]
\c SHL r/m8,CL ; D2 /4 [8086]
-\c SHL r/m8,imm8 ; C0 /4 ib [286]
+\c SHL r/m8,imm8 ; C0 /4 ib [186]
\c SHL r/m16,1 ; o16 D1 /4 [8086]
\c SHL r/m16,CL ; o16 D3 /4 [8086]
-\c SHL r/m16,imm8 ; o16 C1 /4 ib [286]
+\c SHL r/m16,imm8 ; o16 C1 /4 ib [186]
\c SHL r/m32,1 ; o32 D1 /4 [386]
\c SHL r/m32,CL ; o32 D3 /4 [386]
\c SHL r/m32,imm8 ; o32 C1 /4 ib [386]
\c SHR r/m8,1 ; D0 /5 [8086]
\c SHR r/m8,CL ; D2 /5 [8086]
-\c SHR r/m8,imm8 ; C0 /5 ib [286]
+\c SHR r/m8,imm8 ; C0 /5 ib [186]
\c SHR r/m16,1 ; o16 D1 /5 [8086]
\c SHR r/m16,CL ; o16 D3 /5 [8086]
-\c SHR r/m16,imm8 ; o16 C1 /5 ib [286]
+\c SHR r/m16,imm8 ; o16 C1 /5 ib [186]
\c SHR r/m32,1 ; o32 D1 /5 [386]
\c SHR r/m32,CL ; o32 D3 /5 [386]
\c SHR r/m32,imm8 ; o32 C1 /5 ib [386]
projects / platform / upstream / nasm.git / blobdiff