* CompuLab Ltd. CM-T35 [8]
-Toolchain
-=========
-
-While ARM Cortex-A8 support ARM v7 instruction set (-march=armv7a) we compile
-with -march=armv5 to allow more compilers to work. For U-Boot code this has
-no performance impact.
-
Build
=====
make omap3_evm_config
make
-* Pandora:
-
-make omap3_pandora_config
-make
-
-* Zoom MDK:
-
-make omap3_zoom1_config
-make
-
* Zoom 2:
make omap3_zoom2_config
make cm_t35_config
make
-* BlueLYNX-X:
-
-make omap3_mvblx_config
-make
Custom commands
===============
To enable hardware assisted BCH8 (8-bit BCH [Bose, Chaudhuri, Hocquenghem]) on
OMAP3 devices we can use the BCH library in lib/bch.c. To do so add CONFIG_BCH
-to enable the library and CONFIG_NAND_OMAP_BCH8 to to enable hardware assisted
-syndrom generation to your board config.
+and set CONFIG_NAND_OMAP_ECCSCHEME=5 (refer README.nand) for selecting BCH8_SW.
The NAND OOB layout is the same as in linux kernel, if the linux kernel BCH8
implementation for OMAP3 works for you so the u-boot version should also.
When you require the SPL to read with BCH8 there are two more configs to
change:
- * CONFIG_SYS_NAND_ECCPOS (must be the same as .eccpos in
+ * CFG_SYS_NAND_ECCPOS (must be the same as .eccpos in
GPMC_NAND_HW_BCH8_ECC_LAYOUT defined in
arch/arm/include/asm/arch-omap3/omap_gpmc.h)
- * CONFIG_SYS_NAND_ECCSIZE must be 512
- * CONFIG_SYS_NAND_ECCBYTES must be 13 for this BCH8 setup
+ * CFG_SYS_NAND_ECCSIZE must be 512
+ * CFG_SYS_NAND_ECCBYTES must be 13 for this BCH8 setup
Acknowledgements
================